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riscv-gcc-1
Commit 770b37b9 by Uros Bizjak
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predicates.md (sse_reg_operand): New predicate. 

	* config/i386/predicates.md (sse_reg_operand): New predicate.
	* config/i386/i386.md (TFmode push splitter): Use sse_reg_operand
	predicate for operand 1.
	(XFmode push splitter): Use fp_register_operand predicate
	for operand 1.
	(*dummy_extendsfdf2, *dummy_extendsfxf2): Remove disabled patterns.
	(SF-DF float_extend push splitter): Add reload_completed insn
	predicate.
	({SF,DF}-XF float_extend_push splitter): Macroize splitter using
	MODEF mode macro.  Add reload_completed insn predicate.

From-SVN: r163857
parent b6ff8128
Showing with 34 additions and 37 deletions
gcc/ChangeLog
2010-09-04 Uros Bizjak <ubizjak@gmail.com>
* config/i386/predicates.md (sse_reg_operand): New predicate.
* config/i386/i386.md (TFmode push splitter): Use sse_reg_operand
predicate for operand 1.
(XFmode push splitter): Use fp_register_operand predicate
for operand 1.
(*dummy_extendsfdf2, *dummy_extendsfxf2): Remove disabled patterns.
(SF-DF float_extend push splitter): Add reload_completed insn
predicate.
({SF,DF}-XF float_extend_push splitter): Macroize splitter using
MODEF mode macro. Add reload_completed insn predicate.
2010-09-04 Paolo Bonzini <bonzini@gnu.org>
* df.h (enum df_ref_class): Remove DF_REF_EXTRACT.
......@@ -58,8 +71,7 @@
-mno-data-in-code and -mcode-xonly here.
* defaults.h (DEFAULT_SWITCH_TAKES_ARG): Add 'd'.
* gcc.c (option_map): Add "j" to --dump entry.
(translate_options): Don't translate -d to -foutput-class-dir=
here.
(translate_options): Don't translate -d to -foutput-class-dir= here.
2010-09-03 Sebastian Pop <sebastian.pop@amd.com>
......
gcc/config/i386/i386.md
......@@ -1685,7 +1685,7 @@
;; "push a byte/word". But actually we use pushl, which has the effect
;; of rounding the amount pushed up to a word.
;; For 64BIT abi we always round up to 8 bytes.
;; For TARGET_64BIT we always round up to 8 bytes.
(define_insn "*push<mode>2_rex64"
[(set (match_operand:SWI124 0 "push_operand" "=X")
(match_operand:SWI124 1 "nonmemory_no_elim_operand" "r<i>"))]
......@@ -2588,19 +2588,19 @@
(define_split
[(set (match_operand:TF 0 "push_operand" "")
(match_operand:TF 1 "sse_reg_operand" ""))]
"TARGET_SSE2 && reload_completed"
[(set (reg:P SP_REG) (plus:P (reg:P SP_REG) (const_int -16)))
(set (mem:TF (reg:P SP_REG)) (match_dup 1))])
(define_split
[(set (match_operand:TF 0 "push_operand" "")
(match_operand:TF 1 "general_operand" ""))]
"TARGET_SSE2 && reload_completed
&& !SSE_REG_P (operands[1])"
[(const_int 0)]
"ix86_split_long_move (operands); DONE;")
(define_split
[(set (match_operand:TF 0 "push_operand" "")
(match_operand:TF 1 "any_fp_register_operand" ""))]
"TARGET_SSE2"
[(set (reg:P SP_REG) (plus:P (reg:P SP_REG) (const_int -16)))
(set (mem:TF (reg:P SP_REG)) (match_dup 1))])
(define_insn "*pushxf"
[(set (match_operand:XF 0 "push_operand" "=<,<")
(match_operand:XF 1 "general_no_elim_operand" "f,ro"))]
......@@ -2633,7 +2633,7 @@
(define_split
[(set (match_operand:XF 0 "push_operand" "")
(match_operand:XF 1 "any_fp_register_operand" ""))]
(match_operand:XF 1 "fp_register_operand" ""))]
"reload_completed"
[(set (reg:P SP_REG) (plus:P (reg:P SP_REG) (match_dup 2)))
(set (mem:XF (reg:P SP_REG)) (match_dup 1))]
......@@ -2643,7 +2643,7 @@
[(set (match_operand:XF 0 "push_operand" "")
(match_operand:XF 1 "general_operand" ""))]
"reload_completed
&& !ANY_FP_REG_P (operands[1])"
&& !FP_REG_P (operands[1])"
[(const_int 0)]
"ix86_split_long_move (operands); DONE;")
......@@ -3970,45 +3970,25 @@
;; Conversions between float and double.
;; These are all no-ops in the model used for the 80387. So just
;; emit moves.
;; These are all no-ops in the model used for the 80387.
;; So just emit moves.
;; %%% Kill these when call knows how to work out a DFmode push earlier.
(define_insn "*dummy_extendsfdf2"
[(set (match_operand:DF 0 "push_operand" "=<")
(float_extend:DF (match_operand:SF 1 "nonimmediate_operand" "fY2")))]
"0"
"#")
(define_split
[(set (match_operand:DF 0 "push_operand" "")
(float_extend:DF (match_operand:SF 1 "fp_register_operand" "")))]
""
"reload_completed"
[(set (reg:P SP_REG) (plus:P (reg:P SP_REG) (const_int -8)))
(set (mem:DF (reg:P SP_REG)) (float_extend:DF (match_dup 1)))])
(define_insn "*dummy_extendsfxf2"
[(set (match_operand:XF 0 "push_operand" "=<")
(float_extend:XF (match_operand:SF 1 "nonimmediate_operand" "f")))]
"0"
"#")
(define_split
[(set (match_operand:XF 0 "push_operand" "")
(float_extend:XF (match_operand:SF 1 "fp_register_operand" "")))]
""
(float_extend:XF (match_operand:MODEF 1 "fp_register_operand" "")))]
"reload_completed"
[(set (reg:P SP_REG) (plus:P (reg:P SP_REG) (match_dup 2)))
(set (mem:XF (reg:P SP_REG)) (float_extend:XF (match_dup 1)))]
"operands[2] = GEN_INT (-GET_MODE_SIZE (XFmode));")
(define_split
[(set (match_operand:XF 0 "push_operand" "")
(float_extend:XF (match_operand:DF 1 "fp_register_operand" "")))]
""
[(set (reg:P SP_REG) (plus:P (reg:P SP_REG) (match_dup 2)))
(set (mem:DF (reg:P SP_REG)) (float_extend:XF (match_dup 1)))]
"operands[2] = GEN_INT (-GET_MODE_SIZE (XFmode));")
(define_expand "extendsfdf2"
[(set (match_operand:DF 0 "nonimmediate_operand" "")
(float_extend:DF (match_operand:SF 1 "general_operand" "")))]
......
gcc/config/i386/predicates.md
......@@ -43,6 +43,11 @@
(and (match_code "reg")
(match_test "MMX_REGNO_P (REGNO (op))")))
;; True if the operand is an SSE register.
(define_predicate "sse_reg_operand"
(and (match_code "reg")
(match_test "SSE_REGNO_P (REGNO (op))")))
;; True if the operand is a Q_REGS class register.
(define_predicate "q_regs_operand"
(match_operand 0 "register_operand")
......
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