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riscv-gcc-1
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lvzhengyang
riscv-gcc-1
Commits
75d71b2f
Commit
75d71b2f
authored
Apr 16, 2001
by
Jeffrey A Law
Committed by
Jeff Law
Apr 16, 2001
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* pa.md (reload_outdi): Operand 0 must be a non hard register.
From-SVN: r41381
parent
9dab060e
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gcc/ChangeLog
View file @
75d71b2f
Mon
Apr
16
08
:
03
:
48
2001
Jeffrey
A
Law
(
law
@cygnus
.
com
)
*
pa
.
md
(
reload_outdi
)
:
Operand
0
must
be
a
non
hard
register
.
*
pa
.
c
(
secondary_reload_class
)
:
SAR
<->
FP
copies
require
a
secondary
register
.
...
...
gcc/config/pa/pa.md
View file @
75d71b2f
...
...
@@ -3039,7 +3039,7 @@
}")
(define_expand "reload_outdi"
[
(set (match_operand:DI 0 "
general
_operand" "")
[
(set (match_operand:DI 0 "
non_hard_reg
_operand" "")
(match_operand:DI 1 "register_operand" "Z"))
(clobber (match_operand:SI 2 "register_operand" "=&r"))]
""
...
...
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