Commit 75d28030 by Richard Earnshaw Committed by Richard Earnshaw

arm.md (casesi): Fix test for Thumb1.

	* arm.md (casesi): Fix test for Thumb1.
	(thumb1_casesi_internal_pic): Likewise.
	(thumb1_casesi_dispatch): Likewise.

From-SVN: r149005
parent 91dc2352
2009-06-27 Richard Earnshaw <rearnsha@arm.com>
* arm.md (casesi): Fix test for Thumb1.
(thumb1_casesi_internal_pic): Likewise.
(thumb1_casesi_dispatch): Likewise.
2009-06-26 Daniel Gutson <dgutson@codesourcery.com> 2009-06-26 Daniel Gutson <dgutson@codesourcery.com>
* config/arm/arm-cores.def: Added core cortex-m0. * config/arm/arm-cores.def: Added core cortex-m0.
......
...@@ -8908,7 +8908,7 @@ ...@@ -8908,7 +8908,7 @@
if (TARGET_ARM) if (TARGET_ARM)
code = CODE_FOR_arm_casesi_internal; code = CODE_FOR_arm_casesi_internal;
else if (TARGET_THUMB) else if (TARGET_THUMB1)
code = CODE_FOR_thumb1_casesi_internal_pic; code = CODE_FOR_thumb1_casesi_internal_pic;
else if (flag_pic) else if (flag_pic)
code = CODE_FOR_thumb2_casesi_internal_pic; code = CODE_FOR_thumb2_casesi_internal_pic;
...@@ -8951,7 +8951,7 @@ ...@@ -8951,7 +8951,7 @@
(match_operand:SI 1 "thumb1_cmp_operand" "") (match_operand:SI 1 "thumb1_cmp_operand" "")
(match_operand 2 "" "") (match_operand 2 "" "")
(match_operand 3 "" "")] (match_operand 3 "" "")]
"TARGET_THUMB" "TARGET_THUMB1"
{ {
rtx reg0; rtx reg0;
rtx test = gen_rtx_GTU (VOIDmode, operands[0], operands[1]); rtx test = gen_rtx_GTU (VOIDmode, operands[0], operands[1]);
...@@ -8972,7 +8972,7 @@ ...@@ -8972,7 +8972,7 @@
UNSPEC_THUMB1_CASESI)) UNSPEC_THUMB1_CASESI))
(clobber (reg:SI IP_REGNUM)) (clobber (reg:SI IP_REGNUM))
(clobber (reg:SI LR_REGNUM))])] (clobber (reg:SI LR_REGNUM))])]
"TARGET_THUMB" "TARGET_THUMB1"
"* return thumb1_output_casesi(operands);" "* return thumb1_output_casesi(operands);"
[(set_attr "length" "4")] [(set_attr "length" "4")]
) )
......
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