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riscv-gcc-1
Commit 75540af0 by Jan Hubicka
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rs6000.md (define_splits): Kill unused constraints. 

	* rs6000.md (define_splits): Kill unused constraints.

	* function.c (thread_prologue_and_epilogue_insns): Kill code
	dealing with non-existent CFG.

From-SVN: r44548
parent ec5c56db
Showing with 66 additions and 62 deletions
gcc/ChangeLog
Wed Aug 1 20:01:42 CEST 2001 Jan Hubicka <jh@suse.cz>
* rs6000.md (define_splits): Kill unused constraints.
Wed Aug 1 20:02:12 CEST 2001 Graham Stott <grahams@redhat.com>
Jan Hubicka <jh@suse.cz>
* function.c (thread_prologue_and_epilogue_insns): Kill code
dealing with non-existent CFG.
2001-08-01 Kazu Hirata <kazu@hxi.com>
* alias.c: Fix comment formatting.
......
gcc/config/rs6000/rs6000.md
......@@ -1955,9 +1955,9 @@
[(set_attr "length" "12")])
(define_split
[(set (match_operand:SI 0 "gpc_reg_operand" "=&r,r")
(neg:SI (abs:SI (match_operand:SI 1 "gpc_reg_operand" "r,0"))))
(clobber (match_scratch:SI 2 "=&r,&r"))]
[(set (match_operand:SI 0 "gpc_reg_operand" "")
(neg:SI (abs:SI (match_operand:SI 1 "gpc_reg_operand" ""))))
(clobber (match_scratch:SI 2 ""))]
"! TARGET_POWER && reload_completed"
[(set (match_dup 2) (ashiftrt:SI (match_dup 1) (const_int 31)))
(set (match_dup 0) (xor:SI (match_dup 2) (match_dup 1)))
......@@ -2737,8 +2737,8 @@
(define_split
[(set (match_operand:CC 0 "cc_reg_not_cr0_operand" "")
(compare:CC (match_operator:SI 4 "boolean_operator"
[(match_operand:SI 1 "gpc_reg_operand" "%r,r")
(match_operand:SI 2 "gpc_reg_operand" "r,r")])
[(match_operand:SI 1 "gpc_reg_operand" "")
(match_operand:SI 2 "gpc_reg_operand" "")])
(const_int 0)))
(clobber (match_scratch:SI 3 ""))]
"! TARGET_POWERPC64 && reload_completed"
......@@ -2764,12 +2764,12 @@
(set_attr "length" "4,8")])
(define_split
[(set (match_operand:CC 3 "cc_reg_operand" "=x,?y")
[(set (match_operand:CC 3 "cc_reg_operand" "")
(compare:CC (match_operator:SI 4 "boolean_operator"
[(match_operand:SI 1 "gpc_reg_operand" "%r,r")
(match_operand:SI 2 "gpc_reg_operand" "r,r")])
[(match_operand:SI 1 "gpc_reg_operand" "")
(match_operand:SI 2 "gpc_reg_operand" "")])
(const_int 0)))
(set (match_operand:SI 0 "gpc_reg_operand" "=r,r")
(set (match_operand:SI 0 "gpc_reg_operand" "")
(match_dup 4))]
"! TARGET_POWERPC64 && reload_completed"
[(set (match_dup 0) (match_dup 4))
......@@ -2825,8 +2825,8 @@
(define_split
[(set (match_operand:CC 0 "cc_reg_not_cr0_operand" "")
(compare:CC (match_operator:SI 4 "boolean_operator"
[(not:SI (match_operand:SI 1 "gpc_reg_operand" "r"))
(match_operand:SI 2 "gpc_reg_operand" "r")])
[(not:SI (match_operand:SI 1 "gpc_reg_operand" ""))
(match_operand:SI 2 "gpc_reg_operand" "")])
(const_int 0)))
(clobber (match_scratch:SI 3 ""))]
"! TARGET_POWERPC64 && reload_completed"
......@@ -2852,12 +2852,12 @@
(set_attr "length" "4,8")])
(define_split
[(set (match_operand:CC 3 "cc_reg_operand" "=x,?y")
[(set (match_operand:CC 3 "cc_reg_operand" "")
(compare:CC (match_operator:SI 4 "boolean_operator"
[(not:SI (match_operand:SI 1 "gpc_reg_operand" "%r,r"))
(match_operand:SI 2 "gpc_reg_operand" "r,r")])
[(not:SI (match_operand:SI 1 "gpc_reg_operand" ""))
(match_operand:SI 2 "gpc_reg_operand" "")])
(const_int 0)))
(set (match_operand:SI 0 "gpc_reg_operand" "=r,r")
(set (match_operand:SI 0 "gpc_reg_operand" "")
(match_dup 4))]
"! TARGET_POWERPC64 && reload_completed"
[(set (match_dup 0) (match_dup 4))
......@@ -2891,8 +2891,8 @@
(define_split
[(set (match_operand:CC 0 "cc_reg_not_cr0_operand" "")
(compare:CC (match_operator:SI 4 "boolean_operator"
[(not:SI (match_operand:SI 1 "gpc_reg_operand" "r"))
(not:SI (match_operand:SI 2 "gpc_reg_operand" "r"))])
[(not:SI (match_operand:SI 1 "gpc_reg_operand" ""))
(not:SI (match_operand:SI 2 "gpc_reg_operand" ""))])
(const_int 0)))
(clobber (match_scratch:SI 3 ""))]
"! TARGET_POWERPC64 && reload_completed"
......@@ -2918,12 +2918,12 @@
(set_attr "length" "4,8")])
(define_split
[(set (match_operand:CC 3 "cc_reg_operand" "=x,?y")
[(set (match_operand:CC 3 "cc_reg_operand" "")
(compare:CC (match_operator:SI 4 "boolean_operator"
[(not:SI (match_operand:SI 1 "gpc_reg_operand" "%r,r"))
(not:SI (match_operand:SI 2 "gpc_reg_operand" "r,r"))])
[(not:SI (match_operand:SI 1 "gpc_reg_operand" ""))
(not:SI (match_operand:SI 2 "gpc_reg_operand" ""))])
(const_int 0)))
(set (match_operand:SI 0 "gpc_reg_operand" "=r,r")
(set (match_operand:SI 0 "gpc_reg_operand" "")
(match_dup 4))]
"! TARGET_POWERPC64 && reload_completed"
[(set (match_dup 0) (match_dup 4))
......@@ -5197,12 +5197,12 @@
(define_split
[(set (match_operand:SI 0 "gpc_reg_operand" "")
(fix:SI (match_operand:DF 1 "gpc_reg_operand" "f")))
(fix:SI (match_operand:DF 1 "gpc_reg_operand" "")))
(clobber (match_operand:DI 2 "gpc_reg_operand" ""))
(clobber (match_operand:DI 3 "offsettable_mem_operand" ""))]
"(TARGET_POWER2 || TARGET_POWERPC) && TARGET_HARD_FLOAT"
[(set (match_operand:SI 0 "gpc_reg_operand" "")
(fix:SI (match_operand:DF 1 "gpc_reg_operand" "f")))
(fix:SI (match_operand:DF 1 "gpc_reg_operand" "")))
(clobber (match_operand:DI 2 "gpc_reg_operand" ""))
(clobber (match_operand:DI 3 "offsettable_mem_operand" ""))]
"
......@@ -5861,9 +5861,9 @@
[(set_attr "length" "12")])
(define_split
[(set (match_operand:DI 0 "gpc_reg_operand" "=&r,r")
(abs:DI (match_operand:DI 1 "gpc_reg_operand" "r,0")))
(clobber (match_scratch:DI 2 "=&r,&r"))]
[(set (match_operand:DI 0 "gpc_reg_operand" "")
(abs:DI (match_operand:DI 1 "gpc_reg_operand" "")))
(clobber (match_scratch:DI 2 ""))]
"TARGET_POWERPC64 && reload_completed"
[(set (match_dup 2) (ashiftrt:DI (match_dup 1) (const_int 63)))
(set (match_dup 0) (xor:DI (match_dup 2) (match_dup 1)))
......@@ -5879,9 +5879,9 @@
[(set_attr "length" "12")])
(define_split
[(set (match_operand:DI 0 "gpc_reg_operand" "=&r,r")
(neg:DI (abs:DI (match_operand:DI 1 "gpc_reg_operand" "r,0"))))
(clobber (match_scratch:DI 2 "=&r,&r"))]
[(set (match_operand:DI 0 "gpc_reg_operand" "")
(neg:DI (abs:DI (match_operand:DI 1 "gpc_reg_operand" ""))))
(clobber (match_scratch:DI 2 ""))]
"TARGET_POWERPC64 && reload_completed"
[(set (match_dup 2) (ashiftrt:DI (match_dup 1) (const_int 63)))
(set (match_dup 0) (xor:DI (match_dup 2) (match_dup 1)))
......@@ -6972,8 +6972,8 @@
(define_split
[(set (match_operand:CC 0 "cc_reg_not_cr0_operand" "")
(compare:CC (match_operator:DI 4 "boolean_operator"
[(match_operand:DI 1 "gpc_reg_operand" "%r,r")
(match_operand:DI 2 "gpc_reg_operand" "r,r")])
[(match_operand:DI 1 "gpc_reg_operand" "")
(match_operand:DI 2 "gpc_reg_operand" "")])
(const_int 0)))
(clobber (match_scratch:DI 3 ""))]
"TARGET_POWERPC64 && reload_completed"
......@@ -6999,12 +6999,12 @@
(set_attr "length" "4,8")])
(define_split
[(set (match_operand:CC 3 "cc_reg_operand" "=x,?y")
[(set (match_operand:CC 3 "cc_reg_operand" "")
(compare:CC (match_operator:DI 4 "boolean_operator"
[(match_operand:DI 1 "gpc_reg_operand" "%r,r")
(match_operand:DI 2 "gpc_reg_operand" "r,r")])
[(match_operand:DI 1 "gpc_reg_operand" "")
(match_operand:DI 2 "gpc_reg_operand" "")])
(const_int 0)))
(set (match_operand:DI 0 "gpc_reg_operand" "=r,r")
(set (match_operand:DI 0 "gpc_reg_operand" "")
(match_dup 4))]
"TARGET_POWERPC64 && reload_completed"
[(set (match_dup 0) (match_dup 4))
......@@ -7072,8 +7072,8 @@
(define_split
[(set (match_operand:CC 0 "cc_reg_not_cr0_operand" "")
(compare:CC (match_operator:DI 4 "boolean_operator"
[(not:DI (match_operand:DI 1 "gpc_reg_operand" "r"))
(match_operand:DI 2 "gpc_reg_operand" "r")])
[(not:DI (match_operand:DI 1 "gpc_reg_operand" ""))
(match_operand:DI 2 "gpc_reg_operand" "")])
(const_int 0)))
(clobber (match_scratch:DI 3 ""))]
"TARGET_POWERPC64 && reload_completed"
......@@ -7099,12 +7099,12 @@
(set_attr "length" "4,8")])
(define_split
[(set (match_operand:CC 3 "cc_reg_operand" "=x,?y")
[(set (match_operand:CC 3 "cc_reg_operand" "")
(compare:CC (match_operator:DI 4 "boolean_operator"
[(not:DI (match_operand:DI 1 "gpc_reg_operand" "%r,r"))
(match_operand:DI 2 "gpc_reg_operand" "r,r")])
[(not:DI (match_operand:DI 1 "gpc_reg_operand" ""))
(match_operand:DI 2 "gpc_reg_operand" "")])
(const_int 0)))
(set (match_operand:DI 0 "gpc_reg_operand" "=r,r")
(set (match_operand:DI 0 "gpc_reg_operand" "")
(match_dup 4))]
"TARGET_POWERPC64 && reload_completed"
[(set (match_dup 0) (match_dup 4))
......@@ -7138,8 +7138,8 @@
(define_split
[(set (match_operand:CC 0 "cc_reg_not_cr0_operand" "")
(compare:CC (match_operator:DI 4 "boolean_operator"
[(not:DI (match_operand:DI 1 "gpc_reg_operand" "r"))
(not:DI (match_operand:DI 2 "gpc_reg_operand" "r"))])
[(not:DI (match_operand:DI 1 "gpc_reg_operand" ""))
(not:DI (match_operand:DI 2 "gpc_reg_operand" ""))])
(const_int 0)))
(clobber (match_scratch:DI 3 ""))]
"TARGET_POWERPC64 && reload_completed"
......@@ -7165,12 +7165,12 @@
(set_attr "length" "4,8")])
(define_split
[(set (match_operand:CC 3 "cc_reg_operand" "=x,?y")
[(set (match_operand:CC 3 "cc_reg_operand" "")
(compare:CC (match_operator:DI 4 "boolean_operator"
[(not:DI (match_operand:DI 1 "gpc_reg_operand" "%r,r"))
(not:DI (match_operand:DI 2 "gpc_reg_operand" "r,r"))])
[(not:DI (match_operand:DI 1 "gpc_reg_operand" ""))
(not:DI (match_operand:DI 2 "gpc_reg_operand" ""))])
(const_int 0)))
(set (match_operand:DI 0 "gpc_reg_operand" "=r,r")
(set (match_operand:DI 0 "gpc_reg_operand" "")
(match_dup 4))]
"TARGET_POWERPC64 && reload_completed"
[(set (match_dup 0) (match_dup 4))
......@@ -7255,9 +7255,9 @@
;; Used by sched, shorten_branches and final when the GOT pseudo reg
;; didn't get allocated to a hard register.
(define_split
[(set (match_operand:SI 0 "gpc_reg_operand" "=r")
[(set (match_operand:SI 0 "gpc_reg_operand" "")
(unspec:SI [(match_operand:SI 1 "got_no_const_operand" "")
(match_operand:SI 2 "memory_operand" "m")] 8))]
(match_operand:SI 2 "memory_operand" "")] 8))]
"(DEFAULT_ABI == ABI_V4 || DEFAULT_ABI == ABI_SOLARIS)
&& flag_pic == 1
&& (reload_in_progress || reload_completed)"
......
gcc/function.c
......@@ -7211,20 +7211,14 @@ thread_prologue_and_epilogue_insns (f)
seq = gen_sequence ();
end_sequence ();
/* If optimization is off, and perhaps in an empty function,
the entry block will have no successors. */
if (ENTRY_BLOCK_PTR->succ)
{
/* Can't deal with multiple successsors of the entry block. */
if (ENTRY_BLOCK_PTR->succ->succ_next)
abort ();
/* Can't deal with multiple successsors of the entry block
at the moment. Function should always have at least one
entry point. */
if (!ENTRY_BLOCK_PTR->succ || ENTRY_BLOCK_PTR->succ->succ_next)
abort ();
insert_insn_on_edge (seq, ENTRY_BLOCK_PTR->succ);
inserted = 1;
}
else
set_block_for_new_insns (emit_insn_after (seq, f),
ENTRY_BLOCK_PTR->succ);
insert_insn_on_edge (seq, ENTRY_BLOCK_PTR->succ);
inserted = 1;
}
#endif
......
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