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riscv-gcc-1
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lvzhengyang
riscv-gcc-1
Commits
7548d1ad
Commit
7548d1ad
authored
Dec 17, 1995
by
Richard Kenner
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(cmpqi): Fix generation of literal operand of CLM instruction to avoid
double literals (=X'=F'...). From-SVN: r10785
parent
3e4115b7
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gcc/config/i370/i370.md
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gcc/config/i370/i370.md
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7548d1ad
...
...
@@ -295,7 +295,7 @@
if (GET_CODE (operands
[
1
]
) == CONST_INT)
{
mvs_check_page (0, 4, 1);
return
\"
CLM %0,1,=
X'%X
1'
\"
;
return
\"
CLM %0,1,=
FL1'%B
1'
\"
;
}
mvs_check_page (0, 4, 0);
return
\"
CLM %0,1,%1
\"
;
...
...
@@ -306,7 +306,7 @@
if (REG_P (operands
[
1
]
))
{
mvs_check_page (0, 4, 1);
return
\"
CLM %1,1,=
X'%X
0'
\"
;
return
\"
CLM %1,1,=
FL1'%B
0'
\"
;
}
mvs_check_page (0, 4, 0);
return
\"
CLI %1,%B0
\"
;
...
...
@@ -344,7 +344,7 @@
if (GET_CODE (operands
[
1
]
) == CONST_INT)
{
mvs_check_page (0, 4, 1);
return
\"
CLM %0,1,=
X'%X
1'
\"
;
return
\"
CLM %0,1,=
FL1'%B
1'
\"
;
}
mvs_check_page (0, 8, 0);
return
\"
STC %1,140(,13)
\;
CLM %0,1,140(13)
\"
;
...
...
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