Commit 74d5be8c by Oleg Endo

sh.md (*cmpeqsi_t): Remove combine insn pattern and similar corresponding combine split pattern.

gcc/
	* config/sh/sh.md (*cmpeqsi_t): Remove combine insn pattern and similar
	corresponding combine split pattern.

From-SVN: r235956
parent ce23a8ff
2016-05-06 Oleg Endo <olegendo@gcc.gnu.org> 2016-05-06 Oleg Endo <olegendo@gcc.gnu.org>
* config/sh/sh.md (*cmpeqsi_t): Remove combine insn pattern and similar
corresponding combine split pattern.
2016-05-06 Oleg Endo <olegendo@gcc.gnu.org>
PR target/58219 PR target/58219
* config/sh/predicates.md (long_displacement_mem_operand): New. * config/sh/predicates.md (long_displacement_mem_operand): New.
* config/sh/sh.md (movsi_i): Allow for SH2A, disallow for any FPU. * config/sh/sh.md (movsi_i): Allow for SH2A, disallow for any FPU.
......
...@@ -909,22 +909,6 @@ ...@@ -909,22 +909,6 @@
FAIL; FAIL;
}) })
;; FIXME: For some reason, on SH4A and SH2A combine fails to simplify this
;; pattern by itself. What this actually does is:
;; x == 0: (1 >> 0-0) & 1 = 1
;; x != 0: (1 >> 0-x) & 1 = 0
;; Without this the test pr51244-8.c fails on SH2A and SH4A.
(define_insn_and_split "*cmpeqsi_t"
[(set (reg:SI T_REG)
(and:SI (lshiftrt:SI
(const_int 1)
(neg:SI (match_operand:SI 0 "arith_reg_operand" "r")))
(const_int 1)))]
"TARGET_SH1"
"#"
"&& 1"
[(set (reg:SI T_REG) (eq:SI (match_dup 0) (const_int 0)))])
(define_insn "cmpgtsi_t" (define_insn "cmpgtsi_t"
[(set (reg:SI T_REG) [(set (reg:SI T_REG)
(gt:SI (match_operand:SI 0 "arith_reg_operand" "r,r") (gt:SI (match_operand:SI 0 "arith_reg_operand" "r,r")
...@@ -1229,29 +1213,6 @@ ...@@ -1229,29 +1213,6 @@
(label_ref (match_dup 2)) (label_ref (match_dup 2))
(pc)))]) (pc)))])
;; FIXME: Similar to the *cmpeqsi_t pattern above, for some reason, on SH4A
;; and SH2A combine fails to simplify this pattern by itself.
;; What this actually does is:
;; x == 0: (1 >> 0-0) & 1 = 1
;; x != 0: (1 >> 0-x) & 1 = 0
;; Without this the test pr51244-8.c fails on SH2A and SH4A.
(define_split
[(set (pc)
(if_then_else
(eq (and:SI (lshiftrt:SI
(const_int 1)
(neg:SI (match_operand:SI 0 "arith_reg_operand" "")))
(const_int 1))
(const_int 0))
(label_ref (match_operand 2))
(pc)))
(clobber (reg:SI T_REG))]
"TARGET_SH1"
[(set (reg:SI T_REG) (eq:SI (match_dup 0) (const_int 0)))
(set (pc) (if_then_else (eq (reg:SI T_REG) (const_int 0))
(label_ref (match_dup 2))
(pc)))])
;; FIXME: These don't seem to have any effect on the generated cbranch code ;; FIXME: These don't seem to have any effect on the generated cbranch code
;; anymore, but only on some register allocation choices. ;; anymore, but only on some register allocation choices.
(define_split (define_split
......
Markdown is supported
0% or
You are about to add 0 people to the discussion. Proceed with caution.
Finish editing this message first!
Please register or to comment