Commit 74cf1c6d by Robin Kirkham Committed by Jeff Law

m68k.h (TARGET_SWITCHES): -mcpu32 now clears MASK_68881.

        * m68k.h (TARGET_SWITCHES): -mcpu32 now clears MASK_68881.
        (MACHINE_STATE_m68010_up): Replaced __mc68332__ with __mcpu32__.
        * m68k/m68k-none.h(CPP_FPU_SPEC): Update relative to TARGET_SWITCHES.
        (CPP_SPEC, ASM_SPEC, CC1_SPEC): Likewise.
        (CPP_SPEC): -m68332 defines both __mc68332 and __mcpu32__.
        * m68k/t-m68kbare (MULTILIB_OPTIONS): Add mcpu32.
        (MULTILIB_MATCHES): -m68332 now uses mcpu32 libraries, not m68000.
        (MULTILIB_EXCEPTIONS): Don't build 68881 libraries for m68000,
        mcpu32 or m5200.
        * longlong.h: Replace __mc68332__ with __mcpu32__.

From-SVN: r17450
parent 77474480
Fri Jan 23 00:08:55 1998 Robin Kirkham <rjk@mlb.dmt.csiro.au>
* m68k.h (TARGET_SWITCHES): -mcpu32 now clears MASK_68881.
(MACHINE_STATE_m68010_up): Replaced __mc68332__ with __mcpu32__.
* m68k/m68k-none.h(CPP_FPU_SPEC): Update relative to TARGET_SWITCHES.
(CPP_SPEC, ASM_SPEC, CC1_SPEC): Likewise.
(CPP_SPEC): -m68332 defines both __mc68332 and __mcpu32__.
* m68k/t-m68kbare (MULTILIB_OPTIONS): Add mcpu32.
(MULTILIB_MATCHES): -m68332 now uses mcpu32 libraries, not m68000.
(MULTILIB_EXCEPTIONS): Don't build 68881 libraries for m68000,
mcpu32 or m5200.
* longlong.h: Replace __mc68332__ with __mcpu32__.
Thu Jan 22 19:55:40 PST 1998 Jeff Law (law@cygnus.com) Thu Jan 22 19:55:40 PST 1998 Jeff Law (law@cygnus.com)
* version.c: Bump for snapshot. * version.c: Bump for snapshot.
......
...@@ -72,12 +72,12 @@ Boston, MA 02111-1307, USA. */ ...@@ -72,12 +72,12 @@ Boston, MA 02111-1307, USA. */
#if TARGET_CPU_DEFAULT == M68K_CPU_m68302 #if TARGET_CPU_DEFAULT == M68K_CPU_m68302
#define CPP_CPU_DEFAULT_SPEC "%{!ansi:-Dmc68302 } -D__mc68302 -D__mc68302__" #define CPP_CPU_DEFAULT_SPEC "%{!ansi:-Dmc68302 } -D__mc68302 -D__mc68302__"
#define ASM_CPU_DEFAULT_SPEC "-mc68302" #define ASM_CPU_DEFAULT_SPEC "-mc68302"
#define CC1_CPU_DEFAULT_SPEC "-m68000" #define CC1_CPU_DEFAULT_SPEC "-m68302"
#else #else
#if TARGET_CPU_DEFAULT == M68K_CPU_m68332 #if TARGET_CPU_DEFAULT == M68K_CPU_m68332
#define CPP_CPU_DEFAULT_SPEC "%{!ansi:-Dmc68332 } -D__mc68332 -D__mc68332__" #define CPP_CPU_DEFAULT_SPEC "%{!ansi:-Dmc68332 -Dmcpu32 } -D__mc68332 -D__mc68332__ -D__mcpu32 -D__mcpu32__"
#define ASM_CPU_DEFAULT_SPEC "-mc68332" #define ASM_CPU_DEFAULT_SPEC "-mc68332"
#define CC1_CPU_DEFAULT_SPEC "-m68020 -mnobitfield %{!m68881:-msoft-float}" #define CC1_CPU_DEFAULT_SPEC "-m68332"
#else #else
Unrecognized value in TARGET_CPU_DEFAULT. Unrecognized value in TARGET_CPU_DEFAULT.
#endif #endif
...@@ -92,20 +92,21 @@ Unrecognized value in TARGET_CPU_DEFAULT. ...@@ -92,20 +92,21 @@ Unrecognized value in TARGET_CPU_DEFAULT.
#undef CPP_PREDEFINES #undef CPP_PREDEFINES
#define CPP_PREDEFINES "-Dmc68000" #define CPP_PREDEFINES "-Dmc68000"
/* Define one of __HAVE_68881__, __HAVE_FPA__, or nothing (soft float), appropriately. */ /* Define one of __HAVE_68881__, __HAVE_FPA__, __HAVE_SKY__, or nothing
(soft float), appropriately. */
#undef CPP_FPU_SPEC #undef CPP_FPU_SPEC
#if TARGET_DEFAULT & MASK_68881 #if TARGET_DEFAULT & MASK_68881
/* ??? Why isn't m68302 treated like m68000 here? */ #define CPP_FPU_SPEC "\
#define CPP_FPU_SPEC \ %{!mc68000:%{!m68000:%{!m68302:%{!mcpu32:%{!m68332:%{!m5200:%{!msoft-float:%{!mno-68881:%{!mfpa:%{!msky:-D__HAVE_68881__ }}}}}}}}}} \
"%{!mc68000:%{!m68000:%{!m68332:%{!m5200:%{!msoft-float:%{mfpa:-D__HAVE_FPA__ }%{!mfpa:-D__HAVE_68881__ }}}}}}" %{m68881:-D__HAVE_68881__ }%{mfpa:-D__HAVE_FPA__ }%{msky:-D__HAVE_SKY__ }"
#else #else
/* This can't currently happen, but we code it anyway to show how it's done. */ /* This can't currently happen, but we code it anyway to show how it's done. */
#if TARGET_DEFAULT & MASK_FPA #if TARGET_DEFAULT & MASK_FPA
#define CPP_FPU_SPEC \ #define CPP_FPU_SPEC \
"%{!msoft-float:%{m68881:-D__HAVE_68881__ }%{!m68881:-D__HAVE_FPA__ }}" "%{!msoft-float:%{m68881:-D__HAVE_68881__ }%{!m68881:-D__HAVE_FPA__ }}"
#else #else
#define CPP_FPU_SPEC \ #define CPP_FPU_SPEC "\
"%{m68881:-D__HAVE_68881__ }%{mfpa:-D__HAVE_FPA__ }" %{m68881:-D__HAVE_68881__ }%{mfpa:-D__HAVE_FPA__ }%{msky:-D__HAVE_SKY__ }"
#endif #endif
#endif #endif
...@@ -120,8 +121,10 @@ Unrecognized value in TARGET_CPU_DEFAULT. ...@@ -120,8 +121,10 @@ Unrecognized value in TARGET_CPU_DEFAULT.
-m68040: define mc68040 -m68040: define mc68040
-m68060: define mc68060 -m68060: define mc68060
-m68020-40: define mc68020 mc68030 mc68040 -m68020-40: define mc68020 mc68030 mc68040
-m68302: define mc68302 -m68020-60: define mc68020 mc68030 mc68040 mc68060
-m68332: define mc68332 -m68302: define mc68302
-m68332: define mc68332 mcpu32
-mcpu32: define mcpu32
-m5200: define mcf5200 -m5200: define mcf5200
default: define as above appropriately default: define as above appropriately
...@@ -130,10 +133,9 @@ Unrecognized value in TARGET_CPU_DEFAULT. ...@@ -130,10 +133,9 @@ Unrecognized value in TARGET_CPU_DEFAULT.
#undef CPP_SPEC #undef CPP_SPEC
#define CPP_SPEC "\ #define CPP_SPEC "\
%(cpp_fpu) \ %(cpp_fpu)%{!ansi:%{m68302:-Dmc68302 }%{m68010:-Dmc68010 }%{m68020:-Dmc68020 }%{mc68020:-Dmc68020 }%{m68030:-Dmc68030 }%{m68040:-Dmc68040 }%{m68020-40:-Dmc68020 -Dmc68030 -Dmc68040 }%{m68020-60:-Dmc68020 -Dmc68030 -Dmc68040 -Dmc68060 }%{m68060:-Dmc68060 }%{mcpu32:-Dmcpu32 } %{m68332:-Dmc68332 -Dmcpu32 }%{m5200:-Dmcf5200 }} \
%{!ansi:%{m68010:-Dmc68010 }%{m68020:-Dmc68020 }%{mc68020:-Dmc68020 }%{m68030:-Dmc68030 }%{m68040:-Dmc68040 }%{m68020-40:-Dmc68020 -Dmc68030 -Dmc68040 }%{m68060:-Dmc68060 }%{m68302:-Dmc68302 }%{m68332:-Dmc68332 }%{m5200:-Dmcf5200 }} \ %{m68302:-D__mc68302__ -D__mc68302 }%{m68010:-D__mc68010__ -D__mc68010 }%{m68020:-D__mc68020__ -D__mc68020 }%{mc68020:-D__mc68020__ -D__mc68020 }%{m68030:-D__mc68030__ -D__mc68030 }%{m68040:-D__mc68040__ -D__mc68040 }%{m68020-40:-D__mc68020__ -D__mc68030__ -D__mc68040__ -D__mc68020 -D__mc68030 -D__mc68040 }%{m68020-60:-D__mc68020__ -D__mc68030__ -D__mc68040__ -D__mc68020 -D__mc68030 -D__mc68040 -D__mc68060__ -D__mc68060 }%{m68060:-D__mc68060__ -D__mc68060 }%{mcpu32:-D__mcpu32__ -D__mcpu32 }%{m68332:-D__mc68332__ -D__mc68332 -D__mcpu32__ -D__mcpu32 }%{m5200:-D__mcf5200__ -D__mcf5200 } \
%{m68010:-D__mc68010__ -D__mc68010 }%{m68020:-D__mc68020__ -D__mc68020 }%{mc68020:-D__mc68020__ -D__mc68020 }%{m68030:-D__mc68030__ -D__mc68030 }%{m68040:-D__mc68040__ -D__mc68040 }%{m68020-40:-D__mc68020__ -D__mc68030__ -D__mc68040__ -D__mc68020 -D__mc68030 -D__mc68040 }%{mc68060:-D__mc68060__ -D__mc68060 }%{m68302:-D__mc68302__ -D__mc68302 }%{m68332:-D__mc68332__ -D__mc68332 }%{m5200:-D__mcf5200__ -D__mcf5200 } \ %{!mc68000:%{!m68000:%{!m68302:%{!m68010:%{!mc68020:%{!m68020:%{!m68030:%{!m68040:%{!m68020-40:%{!m68020-60:%{!m68060:%{!mcpu32: %{!m68332:%{!m5200:%(cpp_cpu_default)}}}}}}}}}}}}}} \
%{!mc68000:%{!m68000:%{!m68010:%{!mc68020:%{!m68020:%{!m68030:%{!m68040:%{!m68020-40:%{!m68060:%{!m68302:%{!m68332:%{!m5200:%(cpp_cpu_default)}}}}}}}}}}}} \
%(cpp_subtarget) \ %(cpp_subtarget) \
" "
...@@ -141,18 +143,15 @@ Unrecognized value in TARGET_CPU_DEFAULT. ...@@ -141,18 +143,15 @@ Unrecognized value in TARGET_CPU_DEFAULT.
#undef ASM_SPEC #undef ASM_SPEC
#define ASM_SPEC "\ #define ASM_SPEC "\
%{m68851}%{mno-68851}%{m68881}%{mno-68881}%{msoft-float:-mno-68881 } \ %{m68851}%{mno-68851}%{m68881}%{mno-68881}%{msoft-float:-mno-68881 }%{m68000}%{m68302}%{mc68000}%{m68010}%{m68020}%{mc68020}%{m68030}%{m68040}%{m68020-40:-mc68040 }%{m68020-60:-mc68040 }%{m68060}%{mcpu32}%{m68332}%{m5200}%{!mc68000:%{!m68000:%{!m68302:%{!m68010:%{!mc68020:%{!m68020:%{!m68030:%{!m68040:%{!m68020-40:%{!m68020-60:%{!m68060:%{!mcpu32:%{!m68332:%{!m5200:%(asm_cpu_default) }}}}}}}}}}}}}} \
%{m68000}%{mc68000}%{m68010}%{m68020}%{mc68020}%{m68030}%{m68040}%{m68020-40:-mc68040}%{m68060}%{m68302}%{m68332}%{m5200} \
%{!mc68000:%{!m68000:%{!m68010:%{!mc68020:%{!m68020:%{!m68030:%{!m68040:%{!m68020-40:%{!m68060:%{!m68302:%{!m68332:%{!m5200:%(asm_cpu_default)}}}}}}}}}}}} \
" "
/* cc1/cc1plus always receives all the -m flags. If the specs strings above
are consistent with the TARGET_OPTIONS flags in m68k.h, there should be no
need for any further cc1/cc1plus specs. */
#undef CC1_SPEC #undef CC1_SPEC
#define CC1_SPEC "\ #define CC1_SPEC ""
%{m68000:%{!m68881:-msoft-float }}%{m68302:-m68000 }%{m68332:-m68020 -mnobitfield %{!m68881:-msoft-float }} \
"
/* ??? Is this needed?
%{!m68000:%{!mc68000:%{!m68010:%{!mc68020:%{!m68020:%{!m68030:%{!m68040:%{!m68020-40:%{!m68302:%{!m68332:%(cc1_cpu_default)}}}}}}}}}}
*/
/* This macro defines names of additional specifications to put in the specs /* This macro defines names of additional specifications to put in the specs
that can be used in various specifications like CC1_SPEC. Its definition that can be used in various specifications like CC1_SPEC. Its definition
......
...@@ -165,17 +165,18 @@ extern int target_flags; ...@@ -165,17 +165,18 @@ extern int target_flags;
{ "68060", - (MASK_5200|MASK_68040)}, \ { "68060", - (MASK_5200|MASK_68040)}, \
{ "68060", (MASK_68020|MASK_68881|MASK_BITFIELD \ { "68060", (MASK_68020|MASK_68881|MASK_BITFIELD \
|MASK_68040_ONLY|MASK_68060)}, \ |MASK_68040_ONLY|MASK_68060)}, \
{ "5200", - (MASK_68060|MASK_68040|MASK_68020|MASK_BITFIELD|MASK_68881)}, \ { "5200", - (MASK_68060|MASK_68040|MASK_68020|MASK_BITFIELD \
|MASK_68881)}, \
{ "5200", (MASK_5200)}, \ { "5200", (MASK_5200)}, \
{ "68851", 0}, \ { "68851", 0}, \
{ "no-68851", 0}, \ { "no-68851", 0}, \
{ "68302", - (MASK_5200|MASK_68060|MASK_68040|MASK_68040_ONLY \ { "68302", - (MASK_5200|MASK_68060|MASK_68040|MASK_68040_ONLY \
|MASK_68020|MASK_BITFIELD|MASK_68881)}, \ |MASK_68020|MASK_BITFIELD|MASK_68881)}, \
{ "68332", - (MASK_5200|MASK_68060|MASK_68040|MASK_68040_ONLY \ { "68332", - (MASK_5200|MASK_68060|MASK_68040|MASK_68040_ONLY \
|MASK_BITFIELD)}, \ |MASK_BITFIELD|MASK_68881)}, \
{ "68332", MASK_68020}, \ { "68332", MASK_68020}, \
{ "cpu32", - (MASK_5200|MASK_68060|MASK_68040|MASK_68040_ONLY \ { "cpu32", - (MASK_5200|MASK_68060|MASK_68040|MASK_68040_ONLY \
|MASK_BITFIELD)}, \ |MASK_BITFIELD|MASK_68881)}, \
{ "cpu32", MASK_68020}, \ { "cpu32", MASK_68020}, \
{ "align-int", MASK_ALIGN_INT }, \ { "align-int", MASK_ALIGN_INT }, \
{ "no-align-int", -MASK_ALIGN_INT }, \ { "no-align-int", -MASK_ALIGN_INT }, \
...@@ -1040,7 +1041,7 @@ while(0) ...@@ -1040,7 +1041,7 @@ while(0)
|| defined(__mc68020__) || defined(mc68020) \ || defined(__mc68020__) || defined(mc68020) \
|| defined(__mc68030__) || defined(mc68030) \ || defined(__mc68030__) || defined(mc68030) \
|| defined(__mc68040__) || defined(mc68040) \ || defined(__mc68040__) || defined(mc68040) \
|| defined(__mc68332__) || defined(mc68332) || defined(__mcpu32__) || defined(mcpu32)
#define MACHINE_STATE_m68010_up #define MACHINE_STATE_m68010_up
#endif #endif
......
...@@ -15,10 +15,10 @@ xfgnulib.c: $(srcdir)/config/m68k/fpgnulib.c ...@@ -15,10 +15,10 @@ xfgnulib.c: $(srcdir)/config/m68k/fpgnulib.c
echo '#define EXTFLOAT' > xfgnulib.c echo '#define EXTFLOAT' > xfgnulib.c
cat $(srcdir)/config/m68k/fpgnulib.c >> xfgnulib.c cat $(srcdir)/config/m68k/fpgnulib.c >> xfgnulib.c
MULTILIB_OPTIONS = m68000/m68020/m5200 m68881/msoft-float MULTILIB_OPTIONS = m68000/m68020/m5200/mcpu32 m68881/msoft-float
MULTILIB_DIRNAMES = MULTILIB_DIRNAMES =
MULTILIB_MATCHES = m68000=mc68000 m68000=m68302 m68000=m68332 m68020=mc68020 m68020=m68040 MULTILIB_MATCHES = m68000=mc68000 m68000=m68302 mcpu32=m68332 m68020=mc68020 m68020=m68040 m68020=m68060
MULTILIB_EXCEPTIONS = *m5200/*m68881 *m5200/*msoft-float MULTILIB_EXCEPTIONS = m68000/msoft-float m5200/m68881 m5200/msoft-float mcpu32/m68881 mcpu32/msoft-float
LIBGCC = stmp-multilib LIBGCC = stmp-multilib
INSTALL_LIBGCC = install-multilib INSTALL_LIBGCC = install-multilib
...@@ -205,7 +205,7 @@ in the following sections. ...@@ -205,7 +205,7 @@ in the following sections.
@smallexample @smallexample
@emph{M680x0 Options} @emph{M680x0 Options}
-m68000 -m68020 -m68020-40 -m68020-60 -m68030 -m68040 -m68000 -m68020 -m68020-40 -m68020-60 -m68030 -m68040
-m68060 -m5200 -m68881 -mbitfield -mc68000 -mc68020 -mfpa -m68060 -mcpu32 -m5200 -m68881 -mbitfield -mc68000 -mc68020 -mfpa
-mnobitfield -mrtd -mshort -msoft-float -malign-int -mnobitfield -mrtd -mshort -msoft-float -malign-int
@emph{VAX Options} @emph{VAX Options}
...@@ -2917,6 +2917,9 @@ given below. ...@@ -2917,6 +2917,9 @@ given below.
Generate output for a 68000. This is the default Generate output for a 68000. This is the default
when the compiler is configured for 68000-based systems. when the compiler is configured for 68000-based systems.
Use this option for microcontrollers with a 68000 or EC000 core,
including the 68008, 68302, 68306, 68307, 68322, 68328 and 68356.
@item -m68020 @item -m68020
@itemx -mc68020 @itemx -mc68020
Generate output for a 68020. This is the default Generate output for a 68020. This is the default
...@@ -2936,21 +2939,32 @@ Generate output for a 68040. This is the default when the compiler is ...@@ -2936,21 +2939,32 @@ Generate output for a 68040. This is the default when the compiler is
configured for 68040-based systems. configured for 68040-based systems.
This option inhibits the use of 68881/68882 instructions that have to be This option inhibits the use of 68881/68882 instructions that have to be
emulated by software on the 68040. If your 68040 does not have code to emulated by software on the 68040. Use this option if your 68040 does not
emulate those instructions, use @samp{-m68040}. have code to emulate those instructions.
@item -m68060 @item -m68060
Generate output for a 68060. This is the default when the compiler is Generate output for a 68060. This is the default when the compiler is
configured for 68060-based systems. configured for 68060-based systems.
This option inhibits the use of 68020 and 68881/68882 instructions that This option inhibits the use of 68020 and 68881/68882 instructions that
have to be emulated by software on the 68060. If your 68060 does not have to be emulated by software on the 68060. Use this option if your 68060
have code to emulate those instructions, use @samp{-m68060}. does not have code to emulate those instructions.
@item -mcpu32
Generate output for a CPU32. This is the default
when the compiler is configured for CPU32-based systems.
Use this option for microcontrollers with a
CPU32 or CPU32+ core, including the 68330, 68331, 68332, 68333, 68334,
68336, 68340, 68341, 68349 and 68360.
@item -m5200 @item -m5200
Generate output for a 520X "coldfire" family cpu. This is the default Generate output for a 520X "coldfire" family cpu. This is the default
when the compiler is configured for 520X-based systems. when the compiler is configured for 520X-based systems.
Use this option for microcontroller with a 5200 core, including
the MCF5202, MCF5203, MCF5204 and MCF5202.
@item -m68020-40 @item -m68020-40
Generate output for a 68040, without using any of the new instructions. Generate output for a 68040, without using any of the new instructions.
...@@ -2980,8 +2994,8 @@ cross-compilation. The embedded targets @samp{m68k-*-aout} and ...@@ -2980,8 +2994,8 @@ cross-compilation. The embedded targets @samp{m68k-*-aout} and
Consider type @code{int} to be 16 bits wide, like @code{short int}. Consider type @code{int} to be 16 bits wide, like @code{short int}.
@item -mnobitfield @item -mnobitfield
Do not use the bit-field instructions. The @samp{-m68000} option Do not use the bit-field instructions. The @samp{-m68000}, @samp{-mcpu32}
implies @w{@samp{-mnobitfield}}. and @samp{-m5200} options imply @w{@samp{-mnobitfield}}.
@item -mbitfield @item -mbitfield
Do use the bit-field instructions. The @samp{-m68020} option implies Do use the bit-field instructions. The @samp{-m68020} option implies
...@@ -3009,7 +3023,7 @@ function with too many arguments. (Normally, extra arguments are ...@@ -3009,7 +3023,7 @@ function with too many arguments. (Normally, extra arguments are
harmlessly ignored.) harmlessly ignored.)
The @code{rtd} instruction is supported by the 68010, 68020, 68030, The @code{rtd} instruction is supported by the 68010, 68020, 68030,
68040, and 68060 processors, but not by the 68000 or 5200. 68040, 68060 and CPU32 processors, but not by the 68000 or 5200.
@item -malign-int @item -malign-int
@itemx -mno-align-int @itemx -mno-align-int
......
...@@ -488,7 +488,7 @@ UDItype __umulsidi3 (USItype, USItype); ...@@ -488,7 +488,7 @@ UDItype __umulsidi3 (USItype, USItype);
#if defined (__mc68020__) || defined(mc68020) \ #if defined (__mc68020__) || defined(mc68020) \
|| defined(__mc68030__) || defined(mc68030) \ || defined(__mc68030__) || defined(mc68030) \
|| defined(__mc68040__) || defined(mc68040) \ || defined(__mc68040__) || defined(mc68040) \
|| defined(__mc68332__) || defined(mc68332) \ || defined(__mcpu32__) || defined(mcpu32) \
|| defined(__NeXT__) || defined(__NeXT__)
#define umul_ppmm(w1, w0, u, v) \ #define umul_ppmm(w1, w0, u, v) \
__asm__ ("mulu%.l %3,%1:%0" \ __asm__ ("mulu%.l %3,%1:%0" \
......
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