Fix alpha-x-m32r-elf bugs.

	* cse.c (simplify_unary_operation): Sign-extend constants when
	they have the most significant bit set for the target.
	* real.c (endian): Sign-extend 32 bit output values on a 64 bit
	host.
	* m32r/m32r.c (m32r_expand_prologue): Store pretend_size in
	HOST_WIDE_INT temporary before negating it.
	* m32r/m32r.md (movsi_insn+1): Use ~0xffff instead of 0xffff0000.

From-SVN: r24254

gcc/ChangeLog

+Thu Dec 10 16:02:06 1998  Jim Wilson  <wilson@cygnus.com>
+
+	* cse.c (simplify_unary_operation): Sign-extend constants when
+	they have the most significant bit set for the target.
+	* real.c (endian): Sign-extend 32 bit output values on a 64 bit
+	host.
+	* m32r/m32r.c (m32r_expand_prologue): Store pretend_size in
+	HOST_WIDE_INT temporary before negating it.
+	* m32r/m32r.md (movsi_insn+1): Use ~0xffff instead of 0xffff0000.
+
 Thu Dec 10 15:05:59 1998  Dave Brolley  <brolley@cygnus.com>
 
 	* objc/objc-act.c (lang_init_options): Enclose cpplib related code in

gcc/config/m32r/m32r.c

@@ -1551,9 +1551,14 @@ m32r_expand_prologue ()
 
   /* Allocate space for register arguments if this is a variadic function.  */
   if (current_frame_info.pretend_size != 0)
-    emit_insn (gen_addsi3 (stack_pointer_rtx,
-			   stack_pointer_rtx,
-			   GEN_INT (-current_frame_info.pretend_size)));
+    {
+      /* Use a HOST_WIDE_INT temporary, since negating an unsigned int gives
+	 the wrong result on a 64-bit host.  */
+      HOST_WIDE_INT pretend_size = current_frame_info.pretend_size;
+      emit_insn (gen_addsi3 (stack_pointer_rtx,
+			     stack_pointer_rtx,
+			     GEN_INT (-pretend_size)));
+    }
 
   /* Save any registers we need to and set up fp.  */
 

gcc/config/m32r/m32r.md

@@ -434,8 +434,9 @@
 	}
     }
 
-  /* Can't use any two byte insn, fall back to seth/or3.  */
-  operands[2] = GEN_INT ((val) & 0xffff0000);
+  /* Can't use any two byte insn, fall back to seth/or3.  Use ~0xffff instead
+     of 0xffff0000, since the later fails on a 64-bit host.  */
+  operands[2] = GEN_INT ((val) & ~0xffff);
   operands[3] = GEN_INT ((val) & 0xffff);
 }")
 

gcc/cse.c

@@ -3242,6 +3242,19 @@ simplify_unary_operation (code, mode, op, op_mode)
 	      != ((HOST_WIDE_INT) (-1) << (width - 1))))
 	val &= ((HOST_WIDE_INT) 1 << width) - 1;
 
+      /* If this would be an entire word for the target, but is not for
+	 the host, then sign-extend on the host so that the number will look
+	 the same way on the host that it would on the target.
+
+	 For example, when building a 64 bit alpha hosted 32 bit sparc
+	 targeted compiler, then we want the 32 bit unsigned value -1 to be
+	 represented as a 64 bit value -1, and not as 0x00000000ffffffff.
+	 The later confuses the sparc backend.  */
+
+      if (BITS_PER_WORD < HOST_BITS_PER_WIDE_INT && BITS_PER_WORD == width
+	  && (val & ((HOST_WIDE_INT) 1 << (width - 1))))
+	val |= ((HOST_WIDE_INT) (-1) << width);
+
       return GEN_INT (val);
     }
 

gcc/real.c

@@ -553,6 +553,20 @@ endian (e, x, mode)
 	  abort ();
 	}
     }
+
+  /* If 32 bits is an entire word for the target, but not for the host,
+     then sign-extend on the host so that the number will look the same
+     way on the host that it would on the target.  See for instance
+     simplify_unary_operation.  */
+
+  if (BITS_PER_WORD < HOST_BITS_PER_WIDE_INT && BITS_PER_WORD == 32)
+    {
+      if (x[0] & ((HOST_WIDE_INT) 1 << 31))
+	x[0] |= ((HOST_WIDE_INT) (-1) << 32);
+
+      if (x[1] & ((HOST_WIDE_INT) 1 << 31))
+	x[1] |= ((HOST_WIDE_INT) (-1) << 32);
+    }
 }