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riscv-gcc-1
Commit 73250c4c by Kyrylo Tkachov Committed by Kyrylo Tkachov
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aarch64.c: Include aarch-cost-tables.h. 


	* config/aarch64/aarch64.c: Include aarch-cost-tables.h.
	(generic_rtx_cost_table): Remove.
	(aarch64_rtx_costs): Use fields from cpu_cost_table.
	* config/aarch64/aarch64-protos.h (tune_params): Use cpu_cost_table for
	insn_extra_cost.
	(cpu_rtx_cost_table): Remove.

From-SVN: r204779
parent 571880a0
Showing with 32 additions and 55 deletions
gcc/ChangeLog
2013-11-14 Kyrylo Tkachov <kyrylo.tkachov@arm.com>
* config/aarch64/aarch64.c: Include aarch-cost-tables.h.
(generic_rtx_cost_table): Remove.
(aarch64_rtx_costs): Use fields from cpu_cost_table.
* config/aarch64/aarch64-protos.h (tune_params): Use cpu_cost_table for
insn_extra_cost.
(cpu_rtx_cost_table): Remove.
2013-11-14 Julian Brown <julian@codesourcery.com> 2013-11-14 Julian Brown <julian@codesourcery.com>
Joey Ye <joey.ye@arm.com> Joey Ye <joey.ye@arm.com>
gcc/config/aarch64/aarch64-protos.h
...@@ -108,25 +108,6 @@ enum aarch64_symbol_type ...@@ -108,25 +108,6 @@ enum aarch64_symbol_type
cost models and vectors for address cost calculations, register cost models and vectors for address cost calculations, register
move costs and memory move costs. */ move costs and memory move costs. */
/* Extra costs for specific insns. Only records the cost above a
single insn. */
struct cpu_rtx_cost_table
{
const int memory_load;
const int memory_store;
const int register_shift;
const int int_divide;
const int float_divide;
const int double_divide;
const int int_multiply;
const int int_multiply_extend;
const int int_multiply_add;
const int int_multiply_extend_add;
const int float_multiply;
const int double_multiply;
};
/* Additional cost for addresses. */ /* Additional cost for addresses. */
struct cpu_addrcost_table struct cpu_addrcost_table
{ {
...@@ -170,7 +151,7 @@ struct cpu_vector_cost ...@@ -170,7 +151,7 @@ struct cpu_vector_cost
struct tune_params struct tune_params
{ {
const struct cpu_rtx_cost_table *const insn_extra_cost; const struct cpu_cost_table *const insn_extra_cost;
const struct cpu_addrcost_table *const addr_cost; const struct cpu_addrcost_table *const addr_cost;
const struct cpu_regmove_cost *const regmove_cost; const struct cpu_regmove_cost *const regmove_cost;
const struct cpu_vector_cost *const vec_costs; const struct cpu_vector_cost *const vec_costs;
......
gcc/config/aarch64/aarch64.c
...@@ -47,6 +47,7 @@ ...@@ -47,6 +47,7 @@
#include "dwarf2.h" #include "dwarf2.h"
#include "cfgloop.h" #include "cfgloop.h"
#include "tree-vectorizer.h" #include "tree-vectorizer.h"
#include "config/arm/aarch-cost-tables.h"
/* Defined for convenience. */ /* Defined for convenience. */
#define POINTER_BYTES (POINTER_SIZE / BITS_PER_UNIT) #define POINTER_BYTES (POINTER_SIZE / BITS_PER_UNIT)
...@@ -149,21 +150,6 @@ unsigned long aarch64_tune_flags = 0; ...@@ -149,21 +150,6 @@ unsigned long aarch64_tune_flags = 0;
#if HAVE_DESIGNATED_INITIALIZERS && GCC_VERSION >= 2007 #if HAVE_DESIGNATED_INITIALIZERS && GCC_VERSION >= 2007
__extension__ __extension__
#endif #endif
static const struct cpu_rtx_cost_table generic_rtx_cost_table =
{
NAMED_PARAM (memory_load, COSTS_N_INSNS (1)),
NAMED_PARAM (memory_store, COSTS_N_INSNS (0)),
NAMED_PARAM (register_shift, COSTS_N_INSNS (1)),
NAMED_PARAM (int_divide, COSTS_N_INSNS (6)),
NAMED_PARAM (float_divide, COSTS_N_INSNS (2)),
NAMED_PARAM (double_divide, COSTS_N_INSNS (6)),
NAMED_PARAM (int_multiply, COSTS_N_INSNS (1)),
NAMED_PARAM (int_multiply_extend, COSTS_N_INSNS (1)),
NAMED_PARAM (int_multiply_add, COSTS_N_INSNS (1)),
NAMED_PARAM (int_multiply_extend_add, COSTS_N_INSNS (1)),
NAMED_PARAM (float_multiply, COSTS_N_INSNS (0)),
NAMED_PARAM (double_multiply, COSTS_N_INSNS (1))
};
#if HAVE_DESIGNATED_INITIALIZERS && GCC_VERSION >= 2007 #if HAVE_DESIGNATED_INITIALIZERS && GCC_VERSION >= 2007
__extension__ __extension__
...@@ -216,7 +202,7 @@ __extension__ ...@@ -216,7 +202,7 @@ __extension__
#endif #endif
static const struct tune_params generic_tunings = static const struct tune_params generic_tunings =
{ {
&generic_rtx_cost_table, &generic_extra_costs,
&generic_addrcost_table, &generic_addrcost_table,
&generic_regmove_cost, &generic_regmove_cost,
&generic_vector_cost, &generic_vector_cost,
...@@ -4491,7 +4477,7 @@ aarch64_rtx_costs (rtx x, int code, int outer ATTRIBUTE_UNUSED, ...@@ -4491,7 +4477,7 @@ aarch64_rtx_costs (rtx x, int code, int outer ATTRIBUTE_UNUSED,
int param ATTRIBUTE_UNUSED, int *cost, bool speed) int param ATTRIBUTE_UNUSED, int *cost, bool speed)
{ {
rtx op0, op1; rtx op0, op1;
const struct cpu_rtx_cost_table *extra_cost const struct cpu_cost_table *extra_cost
= aarch64_tune_params->insn_extra_cost; = aarch64_tune_params->insn_extra_cost;
switch (code) switch (code)
...@@ -4504,7 +4490,7 @@ aarch64_rtx_costs (rtx x, int code, int outer ATTRIBUTE_UNUSED, ...@@ -4504,7 +4490,7 @@ aarch64_rtx_costs (rtx x, int code, int outer ATTRIBUTE_UNUSED,
{ {
case MEM: case MEM:
if (speed) if (speed)
*cost += extra_cost->memory_store; *cost += extra_cost->ldst.store;
if (op1 != const0_rtx) if (op1 != const0_rtx)
*cost += rtx_cost (op1, SET, 1, speed); *cost += rtx_cost (op1, SET, 1, speed);
...@@ -4541,7 +4527,7 @@ aarch64_rtx_costs (rtx x, int code, int outer ATTRIBUTE_UNUSED, ...@@ -4541,7 +4527,7 @@ aarch64_rtx_costs (rtx x, int code, int outer ATTRIBUTE_UNUSED,
case MEM: case MEM:
if (speed) if (speed)
*cost += extra_cost->memory_load; *cost += extra_cost->ldst.load;
return true; return true;
...@@ -4627,7 +4613,8 @@ aarch64_rtx_costs (rtx x, int code, int outer ATTRIBUTE_UNUSED, ...@@ -4627,7 +4613,8 @@ aarch64_rtx_costs (rtx x, int code, int outer ATTRIBUTE_UNUSED,
speed) speed)
+ rtx_cost (op1, PLUS, 1, speed)); + rtx_cost (op1, PLUS, 1, speed));
if (speed) if (speed)
*cost += extra_cost->int_multiply_extend_add; *cost +=
extra_cost->mult[GET_MODE (x) == DImode].extend_add;
return true; return true;
} }
*cost += (rtx_cost (XEXP (op0, 0), MULT, 0, speed) *cost += (rtx_cost (XEXP (op0, 0), MULT, 0, speed)
...@@ -4635,7 +4622,7 @@ aarch64_rtx_costs (rtx x, int code, int outer ATTRIBUTE_UNUSED, ...@@ -4635,7 +4622,7 @@ aarch64_rtx_costs (rtx x, int code, int outer ATTRIBUTE_UNUSED,
+ rtx_cost (op1, PLUS, 1, speed)); + rtx_cost (op1, PLUS, 1, speed));
if (speed) if (speed)
*cost += extra_cost->int_multiply_add; *cost += extra_cost->mult[GET_MODE (x) == DImode].add;
} }
*cost += (rtx_cost (new_op0, PLUS, 0, speed) *cost += (rtx_cost (new_op0, PLUS, 0, speed)
...@@ -4701,7 +4688,7 @@ aarch64_rtx_costs (rtx x, int code, int outer ATTRIBUTE_UNUSED, ...@@ -4701,7 +4688,7 @@ aarch64_rtx_costs (rtx x, int code, int outer ATTRIBUTE_UNUSED,
/* Shifting by a register often takes an extra cycle. */ /* Shifting by a register often takes an extra cycle. */
if (speed && !CONST_INT_P (XEXP (x, 1))) if (speed && !CONST_INT_P (XEXP (x, 1)))
*cost += extra_cost->register_shift; *cost += extra_cost->alu.arith_shift_reg;
*cost += rtx_cost (XEXP (x, 0), ASHIFT, 0, speed); *cost += rtx_cost (XEXP (x, 0), ASHIFT, 0, speed);
return true; return true;
...@@ -4744,19 +4731,19 @@ aarch64_rtx_costs (rtx x, int code, int outer ATTRIBUTE_UNUSED, ...@@ -4744,19 +4731,19 @@ aarch64_rtx_costs (rtx x, int code, int outer ATTRIBUTE_UNUSED,
*cost += (rtx_cost (XEXP (op0, 0), MULT, 0, speed) *cost += (rtx_cost (XEXP (op0, 0), MULT, 0, speed)
+ rtx_cost (XEXP (op1, 0), MULT, 1, speed)); + rtx_cost (XEXP (op1, 0), MULT, 1, speed));
if (speed) if (speed)
*cost += extra_cost->int_multiply_extend; *cost += extra_cost->mult[GET_MODE (x) == DImode].extend;
return true; return true;
} }
if (speed) if (speed)
*cost += extra_cost->int_multiply; *cost += extra_cost->mult[GET_MODE (x) == DImode].simple;
} }
else if (speed) else if (speed)
{ {
if (GET_MODE (x) == DFmode) if (GET_MODE (x) == DFmode)
*cost += extra_cost->double_multiply; *cost += extra_cost->fp[1].mult;
else if (GET_MODE (x) == SFmode) else if (GET_MODE (x) == SFmode)
*cost += extra_cost->float_multiply; *cost += extra_cost->fp[0].mult;
} }
return false; /* All arguments need to be in registers. */ return false; /* All arguments need to be in registers. */
...@@ -4767,14 +4754,14 @@ aarch64_rtx_costs (rtx x, int code, int outer ATTRIBUTE_UNUSED, ...@@ -4767,14 +4754,14 @@ aarch64_rtx_costs (rtx x, int code, int outer ATTRIBUTE_UNUSED,
if (speed) if (speed)
{ {
if (GET_MODE_CLASS (GET_MODE (x)) == MODE_INT) if (GET_MODE_CLASS (GET_MODE (x)) == MODE_INT)
*cost += (extra_cost->int_multiply_add *cost += (extra_cost->mult[GET_MODE (x) == DImode].add
+ extra_cost->int_divide); + extra_cost->mult[GET_MODE (x) == DImode].idiv);
else if (GET_MODE (x) == DFmode) else if (GET_MODE (x) == DFmode)
*cost += (extra_cost->double_multiply *cost += (extra_cost->fp[1].mult
+ extra_cost->double_divide); + extra_cost->fp[1].div);
else if (GET_MODE (x) == SFmode) else if (GET_MODE (x) == SFmode)
*cost += (extra_cost->float_multiply *cost += (extra_cost->fp[0].mult
+ extra_cost->float_divide); + extra_cost->fp[0].div);
} }
return false; /* All arguments need to be in registers. */ return false; /* All arguments need to be in registers. */
...@@ -4784,11 +4771,11 @@ aarch64_rtx_costs (rtx x, int code, int outer ATTRIBUTE_UNUSED, ...@@ -4784,11 +4771,11 @@ aarch64_rtx_costs (rtx x, int code, int outer ATTRIBUTE_UNUSED,
if (speed) if (speed)
{ {
if (GET_MODE_CLASS (GET_MODE (x)) == MODE_INT) if (GET_MODE_CLASS (GET_MODE (x)) == MODE_INT)
*cost += extra_cost->int_divide; *cost += extra_cost->mult[GET_MODE (x) == DImode].idiv;
else if (GET_MODE (x) == DFmode) else if (GET_MODE (x) == DFmode)
*cost += extra_cost->double_divide; *cost += extra_cost->fp[1].div;
else if (GET_MODE (x) == SFmode) else if (GET_MODE (x) == SFmode)
*cost += extra_cost->float_divide; *cost += extra_cost->fp[0].div;
} }
return false; /* All arguments need to be in registers. */ return false; /* All arguments need to be in registers. */
......
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