Commit 730cf822 by Richard Sandiford Committed by Richard Sandiford

mips-protos.h (mips_expand_block_move): Declare.

	* config/mips/mips-protos.h (mips_expand_block_move): Declare.
	(expand_block_move, output_block_move): Remove.
	* config/mips/mips.h (enum block_move_type): Remove.
	* config/mips/mips.c (block_move_call, output_block_move): Remove.
	(mips_block_move_straight, mips_adjust_block_mem): New function.
	(mips_block_move_loop): Renamed and reworked from block_move_loop.
	(mips_expand_block_move): Likewise expand_block_move.  Return false
	to fall back on the target-independent code.
	* config/mips/mips.md (movstrsi): Use mips_expand_block_move.
	(movstrsi_internal*): Remove.

From-SVN: r68071
parent 6cf87ca4
2003-06-17 Richard Sandiford <rsandifo@redhat.com>
* config/mips/mips-protos.h (mips_expand_block_move): Declare.
(expand_block_move, output_block_move): Remove.
* config/mips/mips.h (enum block_move_type): Remove.
* config/mips/mips.c (block_move_call, output_block_move): Remove.
(mips_block_move_straight, mips_adjust_block_mem): New function.
(mips_block_move_loop): Renamed and reworked from block_move_loop.
(mips_expand_block_move): Likewise expand_block_move. Return false
to fall back on the target-independent code.
* config/mips/mips.md (movstrsi): Use mips_expand_block_move.
(movstrsi_internal*): Remove.
2003-06-16 Zack Weinberg <zack@codesourcery.com>
* cpplib.h, cpphash.h, cppcharset.c, cpperror.c, cppexp.c
......
......@@ -78,7 +78,7 @@ extern tree mips_build_va_list PARAMS ((void));
extern void mips_va_start PARAMS ((tree, rtx));
extern struct rtx_def *mips_va_arg PARAMS ((tree, tree));
extern void expand_block_move PARAMS ((rtx *));
extern bool mips_expand_block_move PARAMS ((rtx, rtx, rtx));
extern bool mips_expand_unaligned_load PARAMS ((rtx, rtx,
unsigned int,
int));
......@@ -98,8 +98,6 @@ extern void mips_split_64bit_move PARAMS ((rtx, rtx));
extern const char *mips_output_move PARAMS ((rtx, rtx));
extern const char *mips_emit_prefetch PARAMS ((rtx *));
extern const char *mips_restore_gp PARAMS ((rtx *));
extern const char *output_block_move PARAMS ((rtx, rtx *, int,
enum block_move_type));
extern void override_options PARAMS ((void));
extern void mips_conditional_register_usage PARAMS ((void));
extern void print_operand_address PARAMS ((FILE *, rtx));
......
......@@ -94,15 +94,6 @@ enum mips_abicalls_type {
/* Recast the abicalls class to be the abicalls attribute. */
#define mips_abicalls_attr ((enum attr_abicalls)mips_abicalls)
/* Which type of block move to do (whether or not the last store is
split out so it can fill a branch delay slot). */
enum block_move_type {
BLOCK_MOVE_NORMAL, /* generate complete block move */
BLOCK_MOVE_NOT_LAST, /* generate all but last store */
BLOCK_MOVE_LAST /* generate just the last store */
};
/* Information about one recognized processor. Defined here for the
benefit of TARGET_CPU_CPP_BUILTINS. */
struct mips_cpu_info {
......
......@@ -5460,151 +5460,15 @@ move\\t%0,%z4\\n\\
(define_expand "movstrsi"
[(parallel [(set (match_operand:BLK 0 "general_operand" "")
(match_operand:BLK 1 "general_operand" ""))
(use (match_operand:SI 2 "arith32_operand" ""))
(use (match_operand:SI 3 "immediate_operand" ""))])]
"!TARGET_MIPS16"
"
{
if (operands[0]) /* avoid unused code messages */
{
expand_block_move (operands);
(use (match_operand:SI 2 "" ""))
(use (match_operand:SI 3 "const_int_operand" ""))])]
"!TARGET_MIPS16 && !TARGET_MEMCPY"
{
if (mips_expand_block_move (operands[0], operands[1], operands[2]))
DONE;
}
}")
;; Insn generated by block moves
(define_insn "movstrsi_internal"
[(set (match_operand:BLK 0 "memory_operand" "=o") ;; destination
(match_operand:BLK 1 "memory_operand" "o")) ;; source
(clobber (match_scratch:SI 4 "=&d")) ;; temp 1
(clobber (match_scratch:SI 5 "=&d")) ;; temp 2
(clobber (match_scratch:SI 6 "=&d")) ;; temp 3
(clobber (match_scratch:SI 7 "=&d")) ;; temp 4
(use (match_operand:SI 2 "small_int" "I")) ;; # bytes to move
(use (match_operand:SI 3 "small_int" "I")) ;; alignment
(use (const_int 0))] ;; normal block move
""
"* return output_block_move (insn, operands, 4, BLOCK_MOVE_NORMAL);"
[(set_attr "type" "store")
(set_attr "mode" "none")
(set_attr "length" "80")])
;; We need mips16 versions, because an offset from the stack pointer
;; is not offsettable, since the stack pointer can only handle 4 and 8
;; byte loads.
(define_insn ""
[(set (match_operand:BLK 0 "memory_operand" "=o") ;; destination
(match_operand:BLK 1 "memory_operand" "o")) ;; source
(clobber (match_scratch:SI 4 "=&d")) ;; temp 1
(clobber (match_scratch:SI 5 "=&d")) ;; temp 2
(clobber (match_scratch:SI 6 "=&d")) ;; temp 3
(clobber (match_scratch:SI 7 "=&d")) ;; temp 4
(use (match_operand:SI 2 "small_int" "I")) ;; # bytes to move
(use (match_operand:SI 3 "small_int" "I")) ;; alignment
(use (const_int 0))] ;; normal block move
"TARGET_MIPS16"
"* return output_block_move (insn, operands, 4, BLOCK_MOVE_NORMAL);"
[(set_attr "type" "multi")
(set_attr "mode" "none")
(set_attr "length" "80")])
;; Split a block move into 2 parts, the first part is everything
;; except for the last move, and the second part is just the last
;; store, which is exactly 1 instruction (ie, not a usw), so it can
;; fill a delay slot. This also prevents a bug in delayed branches
;; from showing up, which reuses one of the registers in our clobbers.
;; ??? Disabled because it doesn't preserve alias information for
;; operands 0 and 1. Also, the rtl for the second insn doesn't mention
;; that it uses the registers clobbered by the first.
;;
;; It would probably be better to split the block into individual
;; instructions instead.
(define_split
[(set (mem:BLK (match_operand:SI 0 "register_operand" ""))
(mem:BLK (match_operand:SI 1 "register_operand" "")))
(clobber (match_operand:SI 4 "register_operand" ""))
(clobber (match_operand:SI 5 "register_operand" ""))
(clobber (match_operand:SI 6 "register_operand" ""))
(clobber (match_operand:SI 7 "register_operand" ""))
(use (match_operand:SI 2 "small_int" ""))
(use (match_operand:SI 3 "small_int" ""))
(use (const_int 0))]
"reload_completed && 0 && INTVAL (operands[2]) > 0"
;; All but the last move
[(parallel [(set (mem:BLK (match_dup 0))
(mem:BLK (match_dup 1)))
(clobber (match_dup 4))
(clobber (match_dup 5))
(clobber (match_dup 6))
(clobber (match_dup 7))
(use (match_dup 2))
(use (match_dup 3))
(use (const_int 1))])
;; The last store, so it can fill a delay slot
(parallel [(set (mem:BLK (match_dup 0))
(mem:BLK (match_dup 1)))
(clobber (match_dup 4))
(clobber (match_dup 5))
(clobber (match_dup 6))
(clobber (match_dup 7))
(use (match_dup 2))
(use (match_dup 3))
(use (const_int 2))])]
"")
(define_insn "movstrsi_internal2"
[(set (match_operand:BLK 0 "memory_operand" "=o") ;; destination
(match_operand:BLK 1 "memory_operand" "o")) ;; source
(clobber (match_scratch:SI 4 "=&d")) ;; temp 1
(clobber (match_scratch:SI 5 "=&d")) ;; temp 2
(clobber (match_scratch:SI 6 "=&d")) ;; temp 3
(clobber (match_scratch:SI 7 "=&d")) ;; temp 4
(use (match_operand:SI 2 "small_int" "I")) ;; # bytes to move
(use (match_operand:SI 3 "small_int" "I")) ;; alignment
(use (const_int 1))] ;; all but last store
""
"* return output_block_move (insn, operands, 4, BLOCK_MOVE_NOT_LAST);"
[(set_attr "type" "store")
(set_attr "mode" "none")
(set_attr "length" "80")])
(define_insn ""
[(set (match_operand:BLK 0 "memory_operand" "=o") ;; destination
(match_operand:BLK 1 "memory_operand" "o")) ;; source
(clobber (match_scratch:SI 4 "=&d")) ;; temp 1
(clobber (match_scratch:SI 5 "=&d")) ;; temp 2
(clobber (match_scratch:SI 6 "=&d")) ;; temp 3
(clobber (match_scratch:SI 7 "=&d")) ;; temp 4
(use (match_operand:SI 2 "small_int" "I")) ;; # bytes to move
(use (match_operand:SI 3 "small_int" "I")) ;; alignment
(use (const_int 1))] ;; all but last store
"TARGET_MIPS16"
"* return output_block_move (insn, operands, 4, BLOCK_MOVE_NOT_LAST);"
[(set_attr "type" "multi")
(set_attr "mode" "none")
(set_attr "length" "80")])
(define_insn "movstrsi_internal3"
[(set (match_operand:BLK 0 "memory_operand" "=m") ;; destination
(match_operand:BLK 1 "memory_operand" "m")) ;; source
(clobber (match_scratch:SI 4 "=&d")) ;; temp 1
(clobber (match_scratch:SI 5 "=&d")) ;; temp 2
(clobber (match_scratch:SI 6 "=&d")) ;; temp 3
(clobber (match_scratch:SI 7 "=&d")) ;; temp 4
(use (match_operand:SI 2 "small_int" "I")) ;; # bytes to move
(use (match_operand:SI 3 "small_int" "I")) ;; alignment
(use (const_int 2))] ;; just last store of block move
""
"* return output_block_move (insn, operands, 4, BLOCK_MOVE_LAST);"
[(set_attr "type" "store")
(set_attr "mode" "none")])
else
FAIL;
})
;;
;; ....................
......
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