(orcc peephole): Don't allow FP regs to match pattern.

From-SVN: r2274

gcc/config/sparc/sparc.md

@@ -2945,7 +2945,8 @@
   "std %3,%2")
  
 ;; Optimize the case of following a reg-reg move with a test
-;; of reg just moved.
+;; of reg just moved.  Don't allow floating point regs for operand 1.
+;; This can result from a float to fix conversion.
 
 (define_peephole
   [(set (match_operand:SI 0 "register_operand" "=r")
@@ -2953,8 +2954,9 @@
    (set (reg:CC 0)
 	(compare:CC (match_operand:SI 2 "register_operand" "r")
 		    (const_int 0)))]
-  "rtx_equal_p (operands[2], operands[0])
-   || rtx_equal_p (operands[2], operands[1])"
+  "(rtx_equal_p (operands[2], operands[0])
+    || rtx_equal_p (operands[2], operands[1]))
+   && ! FP_REG_P (operands[1])"
   "orcc %1,%%g0,%0")
 
 ;; Do {sign,zero}-extended compares somewhat more efficiently.