Commit 72df5c1f by Jiong Wang Committed by Marcus Shawcroft

[AArch64] Use helper functions to handle multiple modes.

From-SVN: r212954
parent 64dedd72
2014-07-23 Jiong Wang <jiong.wang@arm.com> 2014-07-23 Jiong Wang <jiong.wang@arm.com>
* config/aarch64/aarch64.c (aarch64_gen_load_pair)
(aarch64_gen_store_pair): New helper function.
(aarch64_save_or_restore_callee_save_registers)
(aarch64_save_or_restore_fprs): Use new helper functions.
2014-07-23 Jiong Wang <jiong.wang@arm.com>
* config/aarch64/aarch64.c (aarch64_next_callee_save): New function. * config/aarch64/aarch64.c (aarch64_next_callee_save): New function.
(aarch64_save_or_restore_callee_save_registers) (aarch64_save_or_restore_callee_save_registers)
(aarch64_save_or_restore_fprs): Use aarch64_next_callee_save. (aarch64_save_or_restore_fprs): Use aarch64_next_callee_save.
......
...@@ -1916,6 +1916,40 @@ aarch64_next_callee_save (unsigned regno, unsigned limit) ...@@ -1916,6 +1916,40 @@ aarch64_next_callee_save (unsigned regno, unsigned limit)
return regno; return regno;
} }
static rtx
aarch64_gen_store_pair (enum machine_mode mode, rtx mem1, rtx reg1, rtx mem2,
rtx reg2)
{
switch (mode)
{
case DImode:
return gen_store_pairdi (mem1, reg1, mem2, reg2);
case DFmode:
return gen_store_pairdf (mem1, reg1, mem2, reg2);
default:
gcc_unreachable ();
}
}
static rtx
aarch64_gen_load_pair (enum machine_mode mode, rtx reg1, rtx mem1, rtx reg2,
rtx mem2)
{
switch (mode)
{
case DImode:
return gen_load_pairdi (reg1, mem1, reg2, mem2);
case DFmode:
return gen_load_pairdf (reg1, mem1, reg2, mem2);
default:
gcc_unreachable ();
}
}
static void static void
aarch64_save_or_restore_fprs (HOST_WIDE_INT start_offset, bool restore) aarch64_save_or_restore_fprs (HOST_WIDE_INT start_offset, bool restore)
{ {
...@@ -1949,10 +1983,10 @@ aarch64_save_or_restore_fprs (HOST_WIDE_INT start_offset, bool restore) ...@@ -1949,10 +1983,10 @@ aarch64_save_or_restore_fprs (HOST_WIDE_INT start_offset, bool restore)
mem2 = gen_mem_ref (DFmode, mem2 = gen_mem_ref (DFmode,
plus_constant (Pmode, stack_pointer_rtx, offset)); plus_constant (Pmode, stack_pointer_rtx, offset));
if (restore == false) if (restore == false)
insn = emit_insn (gen_store_pairdf (mem, reg, mem2, reg2)); insn = emit_insn (aarch64_gen_store_pair (DFmode, mem, reg, mem2, reg2));
else else
{ {
insn = emit_insn (gen_load_pairdf (reg, mem, reg2, mem2)); insn = emit_insn (aarch64_gen_load_pair (DFmode, reg, mem, reg2, mem2));
add_reg_note (insn, REG_CFA_RESTORE, reg); add_reg_note (insn, REG_CFA_RESTORE, reg);
add_reg_note (insn, REG_CFA_RESTORE, reg2); add_reg_note (insn, REG_CFA_RESTORE, reg2);
} }
...@@ -2018,10 +2052,10 @@ aarch64_save_or_restore_callee_save_registers (HOST_WIDE_INT start_offset, ...@@ -2018,10 +2052,10 @@ aarch64_save_or_restore_callee_save_registers (HOST_WIDE_INT start_offset,
mem2 = gen_mem_ref (Pmode, mem2 = gen_mem_ref (Pmode,
plus_constant (Pmode, stack_pointer_rtx, offset)); plus_constant (Pmode, stack_pointer_rtx, offset));
if (restore == false) if (restore == false)
insn = emit_insn (gen_store_pairdi (mem, reg, mem2, reg2)); insn = emit_insn (aarch64_gen_store_pair (DImode, mem, reg, mem2, reg2));
else else
{ {
insn = emit_insn (gen_load_pairdi (reg, mem, reg2, mem2)); insn = emit_insn (aarch64_gen_load_pair (DImode, reg, mem, reg2, mem2));
add_reg_note (insn, REG_CFA_RESTORE, reg); add_reg_note (insn, REG_CFA_RESTORE, reg);
add_reg_note (insn, REG_CFA_RESTORE, reg2); add_reg_note (insn, REG_CFA_RESTORE, reg2);
} }
......
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