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riscv-gcc-1
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lvzhengyang
riscv-gcc-1
Commits
728a0142
Commit
728a0142
authored
Aug 28, 2008
by
Nick Clifton
Committed by
Nick Clifton
Aug 28, 2008
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* config/m32r/m32r.h (IRA_COVER_CLASSES): Define.
From-SVN: r139718
parent
874101ec
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gcc/ChangeLog
View file @
728a0142
2008
-
08
-
28
Nick
Clifton
<
nickc
@redhat
.
com
>
*
config
/
m32r
/
m32r
.
h
(
IRA_COVER_CLASSES
)
:
Define
.
2008
-
08
-
28
Paul
Brook
<
paul
@codesourcery
.
com
>
*
config
/
arm
/
vfp11
.
md
:
Update
license
notice
.
...
...
gcc/config/m32r/m32r.h
View file @
728a0142
/* Definitions of target machine for GNU compiler, Renesas M32R cpu.
Copyright (C) 1996, 1997, 1998, 1999, 2000, 2001, 2002, 2003, 2004,
2005, 2006, 2007 Free Software Foundation, Inc.
2005, 2006, 2007
, 2008
Free Software Foundation, Inc.
This file is part of GCC.
...
...
@@ -624,6 +624,11 @@ enum reg_class
NO_REGS
,
CARRY_REG
,
ACCUM_REGS
,
GENERAL_REGS
,
ALL_REGS
,
LIM_REG_CLASSES
};
#define IRA_COVER_CLASSES \
{ \
ACCUM_REGS, GENERAL_REGS, LIM_REG_CLASSES \
}
#define N_REG_CLASSES ((int) LIM_REG_CLASSES)
/* Give names of register classes as strings for dump file. */
...
...
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