Commit 719e1e80 by H.J. Lu Committed by H.J. Lu

Remove MaskExists property from config/*/*.opt files

2012-03-27  H.J. Lu  <hongjiu.lu@intel.com>

	* config/arm/arm.opt (mapcs): Remove MaskExists.
	* config/cris/linux.opt (mno-gotplt): Likewise.
	* config/i386/i386.opt (mhard-float): Likewise.
	(msse4): Likewise.
	(mno-sse4): Likewise.
	* config/m68k/m68k.opt (mhard-float): Likewise.
	* config/mep/mep.op (mcop32): Likewise.
	* config/pa/pa-hpux.opt (msio): Likewise.
	* config/pa/pa64-hpux.opt (mgnu-ld): Likewise.
	* config/picochip/picochip.opt (mlittle): Likewise.
	* config/sh/sh.opt (mrenesas): Likewise.
	* config/sparc/long-double-switch.opt (mlong-double-128): Likewise.
	* config/sparc/sparc.opt (mhard-float): Likewise.
	* config/v850/v850.opt (mv850es): Likewise.
	* config/vax/vax.opt (mg-float): Likewise.

From-SVN: r185893
parent 429576ac
2012-03-27 H.J. Lu <hongjiu.lu@intel.com>
* config/arm/arm.opt (mapcs): Remove MaskExists.
* config/cris/linux.opt (mno-gotplt): Likewise.
* config/i386/i386.opt (mhard-float): Likewise.
(msse4): Likewise.
(mno-sse4): Likewise.
* config/m68k/m68k.opt (mhard-float): Likewise.
* config/mep/mep.op (mcop32): Likewise.
* config/pa/pa-hpux.opt (msio): Likewise.
* config/pa/pa64-hpux.opt (mgnu-ld): Likewise.
* config/picochip/picochip.opt (mlittle): Likewise.
* config/sh/sh.opt (mrenesas): Likewise.
* config/sparc/long-double-switch.opt (mlong-double-128): Likewise.
* config/sparc/sparc.opt (mhard-float): Likewise.
* config/v850/v850.opt (mv850es): Likewise.
* config/vax/vax.opt (mg-float): Likewise.
2012-03-27 Martin Jambor <mjambor@suse.cz> 2012-03-27 Martin Jambor <mjambor@suse.cz>
PR middle-end/52693 PR middle-end/52693
......
...@@ -59,7 +59,7 @@ Target Report Mask(ABORT_NORETURN) ...@@ -59,7 +59,7 @@ Target Report Mask(ABORT_NORETURN)
Generate a call to abort if a noreturn function returns Generate a call to abort if a noreturn function returns
mapcs mapcs
Target RejectNegative Mask(APCS_FRAME) MaskExists Undocumented Target RejectNegative Mask(APCS_FRAME) Undocumented
mapcs-float mapcs-float
Target Report Mask(APCS_FLOAT) Target Report Mask(APCS_FLOAT)
......
...@@ -23,7 +23,7 @@ mlinux ...@@ -23,7 +23,7 @@ mlinux
Target Report RejectNegative Undocumented Target Report RejectNegative Undocumented
mno-gotplt mno-gotplt
Target Report RejectNegative Mask(AVOID_GOTPLT) MaskExists Target Report RejectNegative Mask(AVOID_GOTPLT)
Together with -fpic and -fPIC, do not use GOTPLT references Together with -fpic and -fPIC, do not use GOTPLT references
; There's a small added setup cost with using GOTPLT references ; There's a small added setup cost with using GOTPLT references
......
...@@ -218,7 +218,7 @@ EnumValue ...@@ -218,7 +218,7 @@ EnumValue
Enum(fpmath_unit) String(both) Value({(enum fpmath_unit) (FPMATH_SSE | FPMATH_387)}) Enum(fpmath_unit) String(both) Value({(enum fpmath_unit) (FPMATH_SSE | FPMATH_387)})
mhard-float mhard-float
Target RejectNegative Mask(80387) MaskExists Save Target RejectNegative Mask(80387) Save
Use hardware fp Use hardware fp
mieee-fp mieee-fp
...@@ -469,11 +469,11 @@ Target Report Mask(ISA_SSE4_2) Var(ix86_isa_flags) Save ...@@ -469,11 +469,11 @@ Target Report Mask(ISA_SSE4_2) Var(ix86_isa_flags) Save
Support MMX, SSE, SSE2, SSE3, SSSE3, SSE4.1 and SSE4.2 built-in functions and code generation Support MMX, SSE, SSE2, SSE3, SSSE3, SSE4.1 and SSE4.2 built-in functions and code generation
msse4 msse4
Target RejectNegative Report Mask(ISA_SSE4_2) MaskExists Var(ix86_isa_flags) Save Target RejectNegative Report Mask(ISA_SSE4_2) Var(ix86_isa_flags) Save
Support MMX, SSE, SSE2, SSE3, SSSE3, SSE4.1 and SSE4.2 built-in functions and code generation Support MMX, SSE, SSE2, SSE3, SSSE3, SSE4.1 and SSE4.2 built-in functions and code generation
mno-sse4 mno-sse4
Target RejectNegative Report InverseMask(ISA_SSE4_1) MaskExists Var(ix86_isa_flags) Save Target RejectNegative Report InverseMask(ISA_SSE4_1) Var(ix86_isa_flags) Save
Do not support SSE4.1 and SSE4.2 built-in functions and code generation Do not support SSE4.1 and SSE4.2 built-in functions and code generation
msse5 msse5
......
...@@ -136,7 +136,7 @@ Target RejectNegative ...@@ -136,7 +136,7 @@ Target RejectNegative
Generate code for a Fido A Generate code for a Fido A
mhard-float mhard-float
Target RejectNegative Mask(HARD_FLOAT) MaskExists Target RejectNegative Mask(HARD_FLOAT)
Generate code which uses hardware floating point instructions Generate code which uses hardware floating point instructions
mid-shared-library mid-shared-library
......
...@@ -55,7 +55,7 @@ Target Mask(COP) ...@@ -55,7 +55,7 @@ Target Mask(COP)
Enable MeP Coprocessor Enable MeP Coprocessor
mcop32 mcop32
Target Mask(COP) MaskExists RejectNegative Target Mask(COP) RejectNegative
Enable MeP Coprocessor with 32-bit registers Enable MeP Coprocessor with 32-bit registers
mcop64 mcop64
......
...@@ -23,7 +23,7 @@ Variable ...@@ -23,7 +23,7 @@ Variable
int flag_pa_unix = TARGET_HPUX_11_31 ? 2003 : TARGET_HPUX_11_11 ? 1998 : TARGET_HPUX_10_10 ? 1995 : 1993 int flag_pa_unix = TARGET_HPUX_11_31 ? 2003 : TARGET_HPUX_11_11 ? 1998 : TARGET_HPUX_10_10 ? 1995 : 1993
msio msio
Target RejectNegative Mask(SIO) MaskExists Target RejectNegative Mask(SIO)
Generate cpp defines for server IO Generate cpp defines for server IO
munix=93 munix=93
......
...@@ -19,7 +19,7 @@ ...@@ -19,7 +19,7 @@
; <http://www.gnu.org/licenses/>. ; <http://www.gnu.org/licenses/>.
mgnu-ld mgnu-ld
Target RejectNegative Mask(GNU_LD) MaskExists Target RejectNegative Mask(GNU_LD)
Assume code will be linked by GNU ld Assume code will be linked by GNU ld
mhp-ld mhp-ld
......
...@@ -43,4 +43,4 @@ Target Mask(INEFFICIENT_WARNINGS) ...@@ -43,4 +43,4 @@ Target Mask(INEFFICIENT_WARNINGS)
Generate warnings when inefficient code is known to be generated. Generate warnings when inefficient code is known to be generated.
minefficient minefficient
Target Mask(INEFFICIENT_WARNINGS) MaskExists Undocumented Target Mask(INEFFICIENT_WARNINGS) Undocumented
...@@ -66,7 +66,7 @@ Target Report RejectNegative Mask(LITTLE_ENDIAN) ...@@ -66,7 +66,7 @@ Target Report RejectNegative Mask(LITTLE_ENDIAN)
Produce little endian code Produce little endian code
mlittle mlittle
Target Report RejectNegative Mask(LITTLE_ENDIAN) MaskExists Target Report RejectNegative Mask(LITTLE_ENDIAN)
Produce little endian code Produce little endian code
mbig-endian mbig-endian
......
...@@ -316,7 +316,7 @@ Target Report RejectNegative Mask(RELAX) ...@@ -316,7 +316,7 @@ Target Report RejectNegative Mask(RELAX)
Shorten address references during linking Shorten address references during linking
mrenesas mrenesas
Target Mask(HITACHI) MaskExists Target Mask(HITACHI)
Follow Renesas (formerly Hitachi) / SuperH calling conventions Follow Renesas (formerly Hitachi) / SuperH calling conventions
msoft-atomic msoft-atomic
......
...@@ -19,7 +19,7 @@ ...@@ -19,7 +19,7 @@
; <http://www.gnu.org/licenses/>. ; <http://www.gnu.org/licenses/>.
mlong-double-128 mlong-double-128
Target Report RejectNegative Mask(LONG_DOUBLE_128) MaskExists Target Report RejectNegative Mask(LONG_DOUBLE_128)
Use 128-bit long double Use 128-bit long double
mlong-double-64 mlong-double-64
......
...@@ -30,7 +30,7 @@ Target Report Mask(FPU) ...@@ -30,7 +30,7 @@ Target Report Mask(FPU)
Use hardware FP Use hardware FP
mhard-float mhard-float
Target RejectNegative Mask(FPU) MaskExists Target RejectNegative Mask(FPU)
Use hardware FP Use hardware FP
msoft-float msoft-float
......
...@@ -102,7 +102,7 @@ Target RejectNegative Mask(V850E1) ...@@ -102,7 +102,7 @@ Target RejectNegative Mask(V850E1)
Compile for the v850e1 processor Compile for the v850e1 processor
mv850es mv850es
Target RejectNegative Mask(V850E1) MaskExists Target RejectNegative Mask(V850E1)
Compile for the v850es variant of the v850e1 Compile for the v850es variant of the v850e1
mv850e2 mv850e2
......
...@@ -31,7 +31,7 @@ Target RejectNegative Mask(G_FLOAT) ...@@ -31,7 +31,7 @@ Target RejectNegative Mask(G_FLOAT)
Generate GFLOAT double precision code Generate GFLOAT double precision code
mg-float mg-float
Target RejectNegative Mask(G_FLOAT) MaskExists Target RejectNegative Mask(G_FLOAT)
Generate GFLOAT double precision code Generate GFLOAT double precision code
mgnu mgnu
......
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