aarch64.c (aarch64_fixed_condition_code_regs): New function.

2013-01-04  Andrew Pinski  <apinski@cavium.com>

	* config/aarch64/aarch64.c (aarch64_fixed_condition_code_regs):
	New function.
	(TARGET_FIXED_CONDITION_CODE_REGS): Define.

2013-01-04  Andrew Pinski  <apinski@cavium.com>

	* gcc.target/aarch64/cmp-1.c: New testcase.

From-SVN: r194920

gcc/ChangeLog

+2013-01-04  Andrew Pinski  <apinski@cavium.com>
+
+	* config/aarch64/aarch64.c (aarch64_fixed_condition_code_regs):
+	New function.
+	(TARGET_FIXED_CONDITION_CODE_REGS): Define.
+
 2013-01-04  Uros Bizjak  <ubizjak@gmail.com>
 
 	* config/i386/i386.c (ix86_legitimize_address): Call convert_to_mode

gcc/config/aarch64/aarch64.c

@@ -3041,6 +3041,16 @@ aarch64_const_double_zero_rtx_p (rtx x)
   return REAL_VALUES_EQUAL (r, dconst0);
 }
 
+/* Return the fixed registers used for condition codes.  */
+
+static bool
+aarch64_fixed_condition_code_regs (unsigned int *p1, unsigned int *p2)
+{
+  *p1 = CC_REGNUM;
+  *p2 = INVALID_REGNUM;
+  return true;
+}
+
 enum machine_mode
 aarch64_select_cc_mode (RTX_CODE code, rtx x, rtx y)
 {
@@ -7551,6 +7561,9 @@ aarch64_vectorize_vec_perm_const_ok (enum machine_mode vmode,
 #define TARGET_VECTORIZE_VEC_PERM_CONST_OK \
   aarch64_vectorize_vec_perm_const_ok
 
+
+#define TARGET_FIXED_CONDITION_CODE_REGS aarch64_fixed_condition_code_regs
+
 struct gcc_target targetm = TARGET_INITIALIZER;
 
 #include "gt-aarch64.h"

gcc/testsuite/ChangeLog

+2013-01-04  Andrew Pinski  <apinski@cavium.com>
+
+	* gcc.target/aarch64/cmp-1.c: New testcase.
+
 2013-01-04  Paul Thomas  <pault@gcc.gnu.org>
 
 	PR fortran/55172

gcc/testsuite/gcc.target/aarch64/cmp-1.c

+/* { dg-do compile } */
+/* { dg-options "-O2" } */
+
+int f(int a, int b)
+{
+  if(a<b)
+    return 1;
+  if(a>b)
+    return -1;
+  return 0;
+}
+
+/* We should optimize away the second cmp. */
+/* { dg-final { scan-assembler-times "cmp\tw" 1 } } */
+