Fix e500 offset handling for TImode.

Given my previous fix for a missing insn pattern for e500, building
glibc runs into an assembler error "Error: operand out of range (256
is not between 0 and 248)".  This comes from an insn:

(insn 115 1209 1210 (set (reg:DF 27 27 [orig:294 _129 ] [294])
        (subreg:DF (mem/c:TI (plus:SI (reg/f:SI 1 1)
                    (const_int 256 [0x100])) [14 %sfp+256 S16 A128]) 0)) 1909 {*frob_df_ti}
     (nil))

This patch adjusts the offset handling for TImode - and TDmode and
PTImode in case such subregs can arise for them - to be the same as
for TFmode, so that proper SPE offset checks are made in the
TARGET_E500_DOUBLE case.

This allows the glibc build to complete.  Testing shows 372 FAILs
across the gcc, g++ and libstdc++ testsuites; more cleanup is
certainly needed, but this gets to the point where the toolchain at
least builds so it's possible to compare test results when fixing
bugs.

	* config/rs6000/rs6000.c (rs6000_legitimate_offset_address_p): For
	TARGET_E500_DOUBLE. handle TDmode, TImode and PTImode the same as
	TFmode, IFmode and KFmode.

From-SVN: r242814

gcc/ChangeLog

 2016-11-23  Joseph Myers  <joseph@codesourcery.com>
 
+	* config/rs6000/rs6000.c (rs6000_legitimate_offset_address_p): For
+	TARGET_E500_DOUBLE. handle TDmode, TImode and PTImode the same as
+	TFmode, IFmode and KFmode.
+
+2016-11-23  Joseph Myers  <joseph@codesourcery.com>
+
 	* config/rs6000/spe.md (*frob_<SPE64:mode>_ti_8): New insn
 	pattern.
 

gcc/config/rs6000/rs6000.c

@@ -8443,14 +8443,13 @@ rs6000_legitimate_offset_address_p (machine_mode mode, rtx x,
     case TFmode:
     case IFmode:
     case KFmode:
+    case TDmode:
+    case TImode:
+    case PTImode:
       if (TARGET_E500_DOUBLE)
 	return (SPE_CONST_OFFSET_OK (offset)
 		&& SPE_CONST_OFFSET_OK (offset + 8));
-      /* fall through */
 
-    case TDmode:
-    case TImode:
-    case PTImode:
       extra = 8;
       if (!worst_case)
 	break;