i386.md (rotateinv): New code attr.

	* config/i386/i386.md (rotateinv): New code attr.
	(*<rotate_insn><mode>3_1, *<rotate_insn>si3_1_zext,
	*<rotate_insn>qi3_1_slp): Emit rorl %eax instead of
	roll $31, %eax, etc.

	* gcc.target/i386/rotate-1.c: Accept rolb or rorb instruction.

From-SVN: r198770

gcc/ChangeLog

 2013-05-10  Jakub Jelinek  <jakub@redhat.com>
 
+	* config/i386/i386.md (rotateinv): New code attr.
+	(*<rotate_insn><mode>3_1, *<rotate_insn>si3_1_zext,
+	*<rotate_insn>qi3_1_slp): Emit rorl %eax instead of
+	roll $31, %eax, etc.
+
 	PR tree-optimization/45216
 	PR tree-optimization/57157
 	* tree-ssa-forwprop.c (simplify_rotate): New function.

gcc/config/i386/i386.md

@@ -761,6 +761,9 @@
 ;; Base name for insn mnemonic.
 (define_code_attr rotate [(rotate "rol") (rotatert "ror")])
 
+;; Base name for insn mnemonic of rotation in the other direction.
+(define_code_attr rotateinv [(rotate "ror") (rotatert "rol")])
+
 ;; Mapping of abs neg operators
 (define_code_iterator absneg [abs neg])
 
@@ -9736,11 +9739,15 @@
       return "#";
 
     default:
-      if (operands[2] == const1_rtx
-	  && (TARGET_SHIFT1 || optimize_function_for_size_p (cfun)))
-	return "<rotate>{<imodesuffix>}\t%0";
-      else
-	return "<rotate>{<imodesuffix>}\t{%2, %0|%0, %2}";
+      if (TARGET_SHIFT1 || optimize_function_for_size_p (cfun))
+	{
+	  if (operands[2] == const1_rtx)
+	    return "<rotate>{<imodesuffix>}\t%0";
+	  if (CONST_INT_P (operands[2])
+	      && INTVAL (operands[2]) == GET_MODE_BITSIZE (<MODE>mode) - 1)
+	    return "<rotateinv>{<imodesuffix>}\t%0";
+	}
+      return "<rotate>{<imodesuffix>}\t{%2, %0|%0, %2}";
     }
 }
   [(set_attr "isa" "*,bmi2")
@@ -9802,11 +9809,14 @@
       return "#";
 
     default:
-      if (operands[2] == const1_rtx
-	  && (TARGET_SHIFT1 || optimize_function_for_size_p (cfun)))
-	return "<rotate>{l}\t%k0";
-      else
-	return "<rotate>{l}\t{%2, %k0|%k0, %2}";
+      if (TARGET_SHIFT1 || optimize_function_for_size_p (cfun))
+	{
+	  if (operands[2] == const1_rtx)
+	    return "<rotate>{l}\t%k0";
+	  if (CONST_INT_P (operands[2]) && INTVAL (operands[2]) == 31)
+	    return "<rotateinv>{l}\t%k0";
+	}
+      return "<rotate>{l}\t{%2, %k0|%k0, %2}";
     }
 }
   [(set_attr "isa" "*,bmi2")
@@ -9853,11 +9863,15 @@
    (clobber (reg:CC FLAGS_REG))]
   "ix86_binary_operator_ok (<CODE>, <MODE>mode, operands)"
 {
-  if (operands[2] == const1_rtx
-      && (TARGET_SHIFT1 || optimize_function_for_size_p (cfun)))
-    return "<rotate>{<imodesuffix>}\t%0";
-  else
-    return "<rotate>{<imodesuffix>}\t{%2, %0|%0, %2}";
+  if (TARGET_SHIFT1 || optimize_function_for_size_p (cfun))
+    {
+      if (operands[2] == const1_rtx)
+	return "<rotate>{<imodesuffix>}\t%0";
+      if (CONST_INT_P (operands[2])
+	  && INTVAL (operands[2]) == GET_MODE_BITSIZE (<MODE>mode) - 1)
+	return "<rotateinv>{<imodesuffix>}\t%0";
+    }
+  return "<rotate>{<imodesuffix>}\t{%2, %0|%0, %2}";
 }
   [(set_attr "type" "rotate")
    (set (attr "length_immediate")
@@ -9879,11 +9893,14 @@
     || (operands[1] == const1_rtx
 	&& TARGET_SHIFT1))"
 {
-  if (operands[1] == const1_rtx
-      && (TARGET_SHIFT1 || optimize_function_for_size_p (cfun)))
-    return "<rotate>{b}\t%0";
-  else
-    return "<rotate>{b}\t{%1, %0|%0, %1}";
+  if (TARGET_SHIFT1 || optimize_function_for_size_p (cfun))
+    {
+      if (operands[2] == const1_rtx)
+	return "<rotate>{b}\t%0";
+      if (CONST_INT_P (operands[2]) && INTVAL (operands[2]) == 7)
+	return "<rotateinv>{b}\t%0";
+    }
+  return "<rotate>{b}\t{%1, %0|%0, %1}";
 }
   [(set_attr "type" "rotate1")
    (set (attr "length_immediate")

gcc/testsuite/ChangeLog

 2013-05-10  Jakub Jelinek  <jakub@redhat.com>
 
+	* gcc.target/i386/rotate-1.c: Accept rolb or rorb instruction.
+
 	PR tree-optimization/45216
 	PR tree-optimization/57157
 	* c-c++-common/rotate-1.c: New test.

gcc/testsuite/gcc.target/i386/rotate-1.c

@@ -13,4 +13,4 @@ main (void)
   return c;
 }
 
-/* { dg-final { scan-assembler "rolb" } } */
+/* { dg-final { scan-assembler "ro\[lr]b" } } */