Commit 6f8c9bd1 by Nick Clifton Committed by Nick Clifton

(FIXED_REGISTERS): Add Maverick registers.

(CALL_USED_REGISTERS): Likewise.
(FIRST_PSEUDO_REGISTER): Update comment	describing how this value is calculated.

From-SVN: r64243
parent cb49b9ad
2003-03-12 Nick Clifton <nickc@redhat.com>
* config/arm/pe.h (FIXED_REGISTERS): Add Maverick registers.
(CALL_USED_REGISTERS): Likewise.
* config/arm/arm.h (FIRST_PSEUDO_REGISTER): Update comment
describing how this value is calculated.
2003-03-12 Hans-Peter Nilsson <hp@bitrange.com>
* configure.in (rlim_t): Define to long if no valid definition
......
......@@ -1008,8 +1008,8 @@ extern const char * structure_size_string;
#define IS_CIRRUS_REGNUM(REGNUM) \
(((REGNUM) >= FIRST_CIRRUS_FP_REGNUM) && ((REGNUM) <= LAST_CIRRUS_FP_REGNUM))
/* The number of hard registers is 16 ARM + 8 FPA + 1 CC + 1 SFP. */
/* Cirrus registers take us up to 43... */
/* The number of hard registers is 16 ARM + 8 FPA + 1 CC + 1 SFP + 1 AFP. */
/* + 16 Cirrus registers take us up to 43. */
#define FIRST_PSEUDO_REGISTER 43
/* Value should be nonzero if functions must have frame pointers.
......
/* Definitions of target machine for GNU compiler, for ARM with PE obj format.
Copyright (C) 1995, 1996, 1999, 2000, 2002 Free Software Foundation, Inc.
Copyright (C) 1995, 1996, 1999, 2000, 2002, 2003 Free Software Foundation, Inc.
Contributed by Doug Evans (dje@cygnus.com).
This file is part of GCC.
......@@ -81,7 +81,9 @@
0,0,0,0,0,0,0,0, \
0,0,0,1,0,1,0,1, \
0,0,0,0,0,0,0,0, \
1,1,1 \
1,1,1, \
1,1,1,1,1,1,1,1, \
1,1,1,1,1,1,1,1 \
}
/* Same as arm.h except r10 is call-saved, not fixed. */
......@@ -91,7 +93,9 @@
1,1,1,1,0,0,0,0, \
0,0,0,1,1,1,1,1, \
1,1,1,1,0,0,0,0, \
1,1,1 \
1,1,1, \
1,1,1,1,1,1,1,1, \
1,1,1,1,1,1,1,1 \
}
/* Define this macro if in some cases global symbols from one translation
......
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