Commit 6f76a878 by Anatoly Sokolov Committed by Anatoly Sokolov

reginfo.c (memory_move_cost): Change rclass argument type form 'enum reg_class' to reg_class_t.

	* reginfo.c (memory_move_cost): Change rclass argument type form
	'enum reg_class' to reg_class_t.
	* reload.h (memory_move_cost): Update prototype.
	* postreload.c reload_cse_simplify_set): Change type dclass var to
	reg_class_t.
	* ira-int.h (ira_allocate_cost_vector, ira_free_cost_vector):
	Update prototype.
	(ira_allocate_and_set_costs): Change aclass argument type form
	'enum reg_class' to reg_class_t.
	* ira-build.c (ira_allocate_cost_vector, ira_free_cost_vector): 
	Change aclass argument type to reg_class_t.
	(update_conflict_hard_reg_costs): Change type aclass and pref vars
	to reg_class_t.
	* gcc/ira.c (setup_class_subset_and_memory_move_costs): Adjust
	memory_move_cost call.

	* config/ia64/ia64.c (ia64_register_move_cost): Remove 'from' and
	'to' local var. Rename from_i and to_i arguments to 'from' and 'to'.
	Change type tmp var to reg_class_t.

From-SVN: r173232
parent 7c4f44cd
2011-05-01 Anatoly Sokolov <aesok@post.ru>
* reginfo.c (memory_move_cost): Change rclass argument type form
'enum reg_class' to reg_class_t.
* reload.h (memory_move_cost): Update prototype.
* postreload.c reload_cse_simplify_set): Change type dclass var to
reg_class_t.
* ira-int.h (ira_allocate_cost_vector, ira_free_cost_vector):
Update prototype.
(ira_allocate_and_set_costs): Change aclass argument type form
'enum reg_class' to reg_class_t.
* ira-build.c (ira_allocate_cost_vector, ira_free_cost_vector):
Change aclass argument type to reg_class_t.
(update_conflict_hard_reg_costs): Change type aclass and pref vars
to reg_class_t.
* gcc/ira.c (setup_class_subset_and_memory_move_costs): Adjust
memory_move_cost call.
* config/ia64/ia64.c (ia64_register_move_cost): Remove 'from' and
'to' local var. Rename from_i and to_i arguments to 'from' and 'to'.
Change type tmp var to reg_class_t.
2011-04-30 Jan Hubicka <jh@suse.cz> 2011-04-30 Jan Hubicka <jh@suse.cz>
* ipa-inline.c (can_inline_edge_p): Disregard limits when * ipa-inline.c (can_inline_edge_p): Disregard limits when
......
...@@ -5347,12 +5347,9 @@ ia64_rtx_costs (rtx x, int code, int outer_code, int *total, ...@@ -5347,12 +5347,9 @@ ia64_rtx_costs (rtx x, int code, int outer_code, int *total,
one in class TO, using MODE. */ one in class TO, using MODE. */
static int static int
ia64_register_move_cost (enum machine_mode mode, reg_class_t from_i, ia64_register_move_cost (enum machine_mode mode, reg_class_t from,
reg_class_t to_i) reg_class_t to)
{ {
enum reg_class from = (enum reg_class) from_i;
enum reg_class to = (enum reg_class) to_i;
/* ADDL_REGS is the same as GR_REGS for movement purposes. */ /* ADDL_REGS is the same as GR_REGS for movement purposes. */
if (to == ADDL_REGS) if (to == ADDL_REGS)
to = GR_REGS; to = GR_REGS;
...@@ -5363,7 +5360,7 @@ ia64_register_move_cost (enum machine_mode mode, reg_class_t from_i, ...@@ -5363,7 +5360,7 @@ ia64_register_move_cost (enum machine_mode mode, reg_class_t from_i,
lower number class as the destination. */ lower number class as the destination. */
if (from < to) if (from < to)
{ {
enum reg_class tmp = to; reg_class_t tmp = to;
to = from, from = tmp; to = from, from = tmp;
} }
......
...@@ -1402,17 +1402,17 @@ initiate_cost_vectors (void) ...@@ -1402,17 +1402,17 @@ initiate_cost_vectors (void)
/* Allocate and return a cost vector VEC for ACLASS. */ /* Allocate and return a cost vector VEC for ACLASS. */
int * int *
ira_allocate_cost_vector (enum reg_class aclass) ira_allocate_cost_vector (reg_class_t aclass)
{ {
return (int *) pool_alloc (cost_vector_pool[aclass]); return (int *) pool_alloc (cost_vector_pool[(int) aclass]);
} }
/* Free a cost vector VEC for ACLASS. */ /* Free a cost vector VEC for ACLASS. */
void void
ira_free_cost_vector (int *vec, enum reg_class aclass) ira_free_cost_vector (int *vec, reg_class_t aclass)
{ {
ira_assert (vec != NULL); ira_assert (vec != NULL);
pool_free (cost_vector_pool[aclass], vec); pool_free (cost_vector_pool[(int) aclass], vec);
} }
/* Finish work with hard register cost vectors. Release allocation /* Finish work with hard register cost vectors. Release allocation
...@@ -2969,19 +2969,20 @@ update_conflict_hard_reg_costs (void) ...@@ -2969,19 +2969,20 @@ update_conflict_hard_reg_costs (void)
FOR_EACH_ALLOCNO (a, ai) FOR_EACH_ALLOCNO (a, ai)
{ {
enum reg_class aclass = ALLOCNO_CLASS (a); reg_class_t aclass = ALLOCNO_CLASS (a);
enum reg_class pref = reg_preferred_class (ALLOCNO_REGNO (a)); reg_class_t pref = reg_preferred_class (ALLOCNO_REGNO (a));
if (reg_class_size[pref] != 1) if (reg_class_size[(int) pref] != 1)
continue; continue;
index = ira_class_hard_reg_index[aclass][ira_class_hard_regs[pref][0]]; index = ira_class_hard_reg_index[(int) aclass]
[ira_class_hard_regs[(int) pref][0]];
if (index < 0) if (index < 0)
continue; continue;
if (ALLOCNO_CONFLICT_HARD_REG_COSTS (a) == NULL if (ALLOCNO_CONFLICT_HARD_REG_COSTS (a) == NULL
|| ALLOCNO_HARD_REG_COSTS (a) == NULL) || ALLOCNO_HARD_REG_COSTS (a) == NULL)
continue; continue;
min = INT_MAX; min = INT_MAX;
for (i = ira_class_hard_regs_num[aclass] - 1; i >= 0; i--) for (i = ira_class_hard_regs_num[(int) aclass] - 1; i >= 0; i--)
if (ALLOCNO_HARD_REG_COSTS (a)[i] > ALLOCNO_CLASS_COST (a) if (ALLOCNO_HARD_REG_COSTS (a)[i] > ALLOCNO_CLASS_COST (a)
&& min > ALLOCNO_HARD_REG_COSTS (a)[i]) && min > ALLOCNO_HARD_REG_COSTS (a)[i])
min = ALLOCNO_HARD_REG_COSTS (a)[i]; min = ALLOCNO_HARD_REG_COSTS (a)[i];
......
...@@ -989,8 +989,8 @@ extern void ira_swap_allocno_copy_ends_if_necessary (ira_copy_t); ...@@ -989,8 +989,8 @@ extern void ira_swap_allocno_copy_ends_if_necessary (ira_copy_t);
extern ira_copy_t ira_add_allocno_copy (ira_allocno_t, ira_allocno_t, int, extern ira_copy_t ira_add_allocno_copy (ira_allocno_t, ira_allocno_t, int,
bool, rtx, ira_loop_tree_node_t); bool, rtx, ira_loop_tree_node_t);
extern int *ira_allocate_cost_vector (enum reg_class); extern int *ira_allocate_cost_vector (reg_class_t);
extern void ira_free_cost_vector (int *, enum reg_class); extern void ira_free_cost_vector (int *, reg_class_t);
extern void ira_flattening (int, int); extern void ira_flattening (int, int);
extern bool ira_build (bool); extern bool ira_build (bool);
...@@ -1347,7 +1347,7 @@ ira_hard_reg_not_in_set_p (int hard_regno, enum machine_mode mode, ...@@ -1347,7 +1347,7 @@ ira_hard_reg_not_in_set_p (int hard_regno, enum machine_mode mode,
/* Allocate cost vector *VEC for hard registers of ACLASS and /* Allocate cost vector *VEC for hard registers of ACLASS and
initialize the elements by VAL if it is necessary */ initialize the elements by VAL if it is necessary */
static inline void static inline void
ira_allocate_and_set_costs (int **vec, enum reg_class aclass, int val) ira_allocate_and_set_costs (int **vec, reg_class_t aclass, int val)
{ {
int i, *reg_costs; int i, *reg_costs;
int len; int len;
...@@ -1355,7 +1355,7 @@ ira_allocate_and_set_costs (int **vec, enum reg_class aclass, int val) ...@@ -1355,7 +1355,7 @@ ira_allocate_and_set_costs (int **vec, enum reg_class aclass, int val)
if (*vec != NULL) if (*vec != NULL)
return; return;
*vec = reg_costs = ira_allocate_cost_vector (aclass); *vec = reg_costs = ira_allocate_cost_vector (aclass);
len = ira_class_hard_regs_num[aclass]; len = ira_class_hard_regs_num[(int) aclass];
for (i = 0; i < len; i++) for (i = 0; i < len; i++)
reg_costs[i] = val; reg_costs[i] = val;
} }
......
...@@ -583,11 +583,11 @@ setup_class_subset_and_memory_move_costs (void) ...@@ -583,11 +583,11 @@ setup_class_subset_and_memory_move_costs (void)
ira_max_memory_move_cost[mode][cl][0] ira_max_memory_move_cost[mode][cl][0]
= ira_memory_move_cost[mode][cl][0] = ira_memory_move_cost[mode][cl][0]
= memory_move_cost ((enum machine_mode) mode, = memory_move_cost ((enum machine_mode) mode,
(enum reg_class) cl, false); (reg_class_t) cl, false);
ira_max_memory_move_cost[mode][cl][1] ira_max_memory_move_cost[mode][cl][1]
= ira_memory_move_cost[mode][cl][1] = ira_memory_move_cost[mode][cl][1]
= memory_move_cost ((enum machine_mode) mode, = memory_move_cost ((enum machine_mode) mode,
(enum reg_class) cl, true); (reg_class_t) cl, true);
/* Costs for NO_REGS are used in cost calculation on the /* Costs for NO_REGS are used in cost calculation on the
1st pass when the preferred register classes are not 1st pass when the preferred register classes are not
known yet. In this case we take the best scenario. */ known yet. In this case we take the best scenario. */
......
...@@ -233,7 +233,7 @@ reload_cse_simplify_set (rtx set, rtx insn) ...@@ -233,7 +233,7 @@ reload_cse_simplify_set (rtx set, rtx insn)
int did_change = 0; int did_change = 0;
int dreg; int dreg;
rtx src; rtx src;
enum reg_class dclass; reg_class_t dclass;
int old_cost; int old_cost;
cselib_val *val; cselib_val *val;
struct elt_loc_list *l; struct elt_loc_list *l;
......
...@@ -629,8 +629,9 @@ register_move_cost (enum machine_mode mode, reg_class_t from, reg_class_t to) ...@@ -629,8 +629,9 @@ register_move_cost (enum machine_mode mode, reg_class_t from, reg_class_t to)
} }
/* Compute cost of moving registers to/from memory. */ /* Compute cost of moving registers to/from memory. */
int int
memory_move_cost (enum machine_mode mode, enum reg_class rclass, bool in) memory_move_cost (enum machine_mode mode, reg_class_t rclass, bool in)
{ {
return targetm.memory_move_cost (mode, rclass, in); return targetm.memory_move_cost (mode, rclass, in);
} }
......
...@@ -31,7 +31,7 @@ along with GCC; see the file COPYING3. If not see ...@@ -31,7 +31,7 @@ along with GCC; see the file COPYING3. If not see
#endif #endif
extern int register_move_cost (enum machine_mode, reg_class_t, reg_class_t); extern int register_move_cost (enum machine_mode, reg_class_t, reg_class_t);
extern int memory_move_cost (enum machine_mode, enum reg_class, bool); extern int memory_move_cost (enum machine_mode, reg_class_t, bool);
extern int memory_move_secondary_cost (enum machine_mode, reg_class_t, bool); extern int memory_move_secondary_cost (enum machine_mode, reg_class_t, bool);
/* Maximum number of reloads we can need. */ /* Maximum number of reloads we can need. */
......
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