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riscv-gcc-1
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lvzhengyang
riscv-gcc-1
Commits
6e9aac46
Commit
6e9aac46
authored
Jul 20, 2001
by
Jan Hubicka
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Plain Diff
Correct typo.
From-SVN: r44213
parent
ed6ba1a5
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gcc/doc/md.texi
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gcc/doc/md.texi
View file @
6e9aac46
...
@@ -2130,7 +2130,7 @@ operand 2 is a constant: the number of consecutive registers.
...
@@ -2130,7 +2130,7 @@ operand 2 is a constant: the number of consecutive registers.
Output
an
push
instruction
.
Operand
0
is
value
to
push
.
Used
only
when
Output
an
push
instruction
.
Operand
0
is
value
to
push
.
Used
only
when
@code{
PUSH_ROUNDING
}
is
defined
.
For
historical
reason
,
this
pattern
may
be
@code{
PUSH_ROUNDING
}
is
defined
.
For
historical
reason
,
this
pattern
may
be
missing
and
in
such
case
an
@code{
mov
}
expander
is
used
instead
,
with
a
missing
and
in
such
case
an
@code{
mov
}
expander
is
used
instead
,
with
a
@code{
MEM
}
expression
forming
the
push
operation
.
The
@c
p
de{
mov
}
expander
@code{
MEM
}
expression
forming
the
push
operation
.
The
@c
o
de{
mov
}
expander
method
is
deprecated
.
method
is
deprecated
.
@cindex
@code{
add
@var{
m
}
3
}
instruction
pattern
@cindex
@code{
add
@var{
m
}
3
}
instruction
pattern
...
...
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