Commit 6e071b1e by Vladimir Makarov Committed by Vladimir Makarov

re PR target/60697 ([aarch64] LRA ICE (Segfault) while building 435.gromacs)

2014-03-28  Vladimir Makarov  <vmakarov@redhat.com>

	PR target/60697
	* lra-constraints.c (index_part_to_reg): New.
	(process_address): Use it.

2014-03-28  Vladimir Makarov  <vmakarov@redhat.com>

	PR target/60697
	* gcc.target/aarch64/pr60697.c: New.

From-SVN: r208926
parent 4bb66ef3
2014-03-28 Vladimir Makarov <vmakarov@redhat.com>
PR target/60697
* lra-constraints.c (index_part_to_reg): New.
(process_address): Use it.
2014-03-27 Jeff Law <law@redhat.com> 2014-03-27 Jeff Law <law@redhat.com>
Jakub Jelinek <jakub@redhat.com> Jakub Jelinek <jakub@redhat.com>
......
...@@ -2631,6 +2631,20 @@ base_plus_disp_to_reg (struct address_info *ad) ...@@ -2631,6 +2631,20 @@ base_plus_disp_to_reg (struct address_info *ad)
return new_reg; return new_reg;
} }
/* Make reload of index part of address AD. Return the new
pseudo. */
static rtx
index_part_to_reg (struct address_info *ad)
{
rtx new_reg;
new_reg = lra_create_new_reg (GET_MODE (*ad->index), NULL_RTX,
INDEX_REG_CLASS, "index term");
expand_mult (GET_MODE (*ad->index), *ad->index_term,
GEN_INT (get_index_scale (ad)), new_reg, 1);
return new_reg;
}
/* Return true if we can add a displacement to address AD, even if that /* Return true if we can add a displacement to address AD, even if that
makes the address invalid. The fix-up code requires any new address makes the address invalid. The fix-up code requires any new address
to be the sum of the BASE_TERM, INDEX and DISP_TERM fields. */ to be the sum of the BASE_TERM, INDEX and DISP_TERM fields. */
...@@ -2935,7 +2949,7 @@ process_address (int nop, rtx *before, rtx *after) ...@@ -2935,7 +2949,7 @@ process_address (int nop, rtx *before, rtx *after)
emit_insn (insns); emit_insn (insns);
*ad.inner = new_reg; *ad.inner = new_reg;
} }
else else if (ad.disp_term != NULL)
{ {
/* base + scale * index + disp => new base + scale * index, /* base + scale * index + disp => new base + scale * index,
case (1) above. */ case (1) above. */
...@@ -2943,6 +2957,18 @@ process_address (int nop, rtx *before, rtx *after) ...@@ -2943,6 +2957,18 @@ process_address (int nop, rtx *before, rtx *after)
*ad.inner = simplify_gen_binary (PLUS, GET_MODE (new_reg), *ad.inner = simplify_gen_binary (PLUS, GET_MODE (new_reg),
new_reg, *ad.index); new_reg, *ad.index);
} }
else
{
/* base + scale * index => base + new_reg,
case (1) above.
Index part of address may become invalid. For example, we
changed pseudo on the equivalent memory and a subreg of the
pseudo onto the memory of different mode for which the scale is
prohibitted. */
new_reg = index_part_to_reg (&ad);
*ad.inner = simplify_gen_binary (PLUS, GET_MODE (new_reg),
*ad.base_term, new_reg);
}
*before = get_insns (); *before = get_insns ();
end_sequence (); end_sequence ();
return true; return true;
......
2014-03-28 Vladimir Makarov <vmakarov@redhat.com>
PR target/60697
* gcc.target/aarch64/pr60697.c: New.
2014-03-27 Jeff Law <law@redhat.com> 2014-03-27 Jeff Law <law@redhat.com>
PR target/60648 PR target/60648
......
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