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riscv-gcc-1
Commit 6db59ad5 by Richard Kenner
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(movsi_const0, movhi): Favor clr with TARGET_5200. 

(add[qhs]3): Don't use two addqw/subqw insns to add small integers to
an address register with TARGET_68060.
(stack push peephole): Use moveq.l with TARGET_5200 (when appropriate).

From-SVN: r12184
parent 0d0dd44d
Showing with 90 additions and 86 deletions
gcc/config/m68k/m68k.md
......@@ -784,14 +784,14 @@
(const_int 0))]
;; clr insns on 68000 read before writing.
;; This isn't so on the 68010, but we have no TARGET_68010.
"(TARGET_68020
"((TARGET_68020 || TARGET_5200)
|| !(GET_CODE (operands[0]) == MEM && MEM_VOLATILE_P (operands[0])))"
"*
{
if (ADDRESS_REG_P (operands[0]))
return \"sub%.l %0,%0\";
/* moveq is faster on the 68000. */
if (DATA_REG_P (operands[0]) && !TARGET_68020)
if (DATA_REG_P (operands[0]) && (!TARGET_68020 && !TARGET_5200))
#if defined(MOTOROLA) && !defined(CRDS)
return \"moveq%.l %#0,%0\";
#else
......@@ -869,7 +869,7 @@
|| GET_CODE (operands[0]) == MEM)
/* clr insns on 68000 read before writing.
This isn't so on the 68010, but we have no TARGET_68010. */
&& (TARGET_68020
&& ((TARGET_68020 || TARGET_5200)
|| !(GET_CODE (operands[0]) == MEM
&& MEM_VOLATILE_P (operands[0]))))
return \"clr%.w %0\";
......@@ -937,7 +937,7 @@
|| GET_CODE (operands[0]) == MEM)
/* clr insns on 68000 read before writing.
This isn't so on the 68010, but we have no TARGET_68010. */
&& (TARGET_68020
&& ((TARGET_68020 || TARGET_5200)
|| !(GET_CODE (operands[0]) == MEM
&& MEM_VOLATILE_P (operands[0]))))
return \"clr%.w %0\";
......@@ -1112,7 +1112,7 @@
if (operands[1] == const0_rtx
/* clr insns on 68000 read before writing.
This isn't so on the 68010, but we have no TARGET_68010. */
&& (TARGET_68020
&& ((TARGET_68020 || TARGET_5200)
|| !(GET_CODE (operands[0]) == MEM && MEM_VOLATILE_P (operands[0]))))
return \"clr%.b %0\";
return \"move%.b %1,%0\";
......@@ -2249,25 +2249,25 @@
? \"subq%.w %2,%0\"
: \"subq%.l %2,%0\");
}
/* On everything except the 68000 it is faster to use two
addqw instructions to add a small integer (8 < N <= 16)
/* On everything except the 68000 and 68060 it is faster to use
two addqw instructions to add a small integer (8 < N <= 16)
to an address register. Likewise for subqw.*/
if (INTVAL (operands[2]) > 8
&& INTVAL (operands[2]) <= 16
&& ADDRESS_REG_P (operands[0])
&& TARGET_68020)
{
operands[2] = gen_rtx (CONST_INT, VOIDmode, INTVAL (operands[2]) - 8);
return \"addq%.w %#8,%0\;addq%.w %2,%0\";
}
if (INTVAL (operands[2]) < -8
&& INTVAL (operands[2]) >= -16
&& ADDRESS_REG_P (operands[0])
&& TARGET_68020)
if (TARGET_68020 && !TARGET_68060 && ADDRESS_REG_P (operands[0]))
{
operands[2] = gen_rtx (CONST_INT, VOIDmode,
- INTVAL (operands[2]) - 8);
return \"subq%.w %#8,%0\;subq%.w %2,%0\";
if (INTVAL (operands[2]) > 8
&& INTVAL (operands[2]) <= 16)
{
operands[2] = gen_rtx (CONST_INT, VOIDmode,
INTVAL (operands[2]) - 8);
return \"addq%.w %#8,%0\;addq%.w %2,%0\";
}
if (INTVAL (operands[2]) < -8
&& INTVAL (operands[2]) >= -16)
{
operands[2] = gen_rtx (CONST_INT, VOIDmode,
- INTVAL (operands[2]) - 8);
return \"subq%.w %#8,%0\;subq%.w %2,%0\";
}
}
#endif
if (ADDRESS_REG_P (operands[0])
......@@ -2316,25 +2316,25 @@
- INTVAL (operands[2]));
return \"subq%.w %2,%0\";
}
/* On everything except the 68000 it is faster to use two
addqw instructions to add a small integer (8 < N <= 16)
/* On everything except the 68000 and 68060 it is faster to use
two addqw instructions to add a small integer (8 < N <= 16)
to an address register. Likewise for subqw. */
if (INTVAL (operands[2]) > 8
&& INTVAL (operands[2]) <= 16
&& ADDRESS_REG_P (operands[0])
&& TARGET_68020)
{
operands[2] = gen_rtx (CONST_INT, VOIDmode, INTVAL (operands[2]) - 8);
return \"addq%.w %#8,%0\;addq%.w %2,%0\";
}
if (INTVAL (operands[2]) < -8
&& INTVAL (operands[2]) >= -16
&& ADDRESS_REG_P (operands[0])
&& TARGET_68020)
if (TARGET_68020 && !TARGET_68060 && ADDRESS_REG_P (operands[0]))
{
operands[2] = gen_rtx (CONST_INT, VOIDmode,
- INTVAL (operands[2]) - 8);
return \"subq%.w %#8,%0\;subq%.w %2,%0\";
if (INTVAL (operands[2]) > 8
&& INTVAL (operands[2]) <= 16)
{
operands[2] = gen_rtx (CONST_INT, VOIDmode,
INTVAL (operands[2]) - 8);
return \"addq%.w %#8,%0\;addq%.w %2,%0\";
}
if (INTVAL (operands[2]) < -8
&& INTVAL (operands[2]) >= -16)
{
operands[2] = gen_rtx (CONST_INT, VOIDmode,
- INTVAL (operands[2]) - 8);
return \"subq%.w %#8,%0\;subq%.w %2,%0\";
}
}
}
#endif
......@@ -2376,25 +2376,25 @@
- INTVAL (operands[1]));
return \"subq%.w %1,%0\";
}
/* On everything except the 68000 it is faster to use two
addqw instructions to add a small integer (8 < N <= 16)
/* On everything except the 68000 and 68060 it is faster to use
two addqw instructions to add a small integer (8 < N <= 16)
to an address register. Likewise for subqw. */
if (INTVAL (operands[1]) > 8
&& INTVAL (operands[1]) <= 16
&& ADDRESS_REG_P (operands[0])
&& TARGET_68020)
if (TARGET_68020 && !TARGET_68060 && ADDRESS_REG_P (operands[0]))
{
operands[1] = gen_rtx (CONST_INT, VOIDmode, INTVAL (operands[1]) - 8);
return \"addq%.w %#8,%0\;addq%.w %1,%0\";
}
if (INTVAL (operands[1]) < -8
&& INTVAL (operands[1]) >= -16
&& ADDRESS_REG_P (operands[0])
&& TARGET_68020)
{
operands[1] = gen_rtx (CONST_INT, VOIDmode,
- INTVAL (operands[1]) - 8);
return \"subq%.w %#8,%0\;subq%.w %1,%0\";
if (INTVAL (operands[1]) > 8
&& INTVAL (operands[1]) <= 16)
{
operands[1] = gen_rtx (CONST_INT, VOIDmode,
INTVAL (operands[1]) - 8);
return \"addq%.w %#8,%0\;addq%.w %1,%0\";
}
if (INTVAL (operands[1]) < -8
&& INTVAL (operands[1]) >= -16)
{
operands[1] = gen_rtx (CONST_INT, VOIDmode,
- INTVAL (operands[1]) - 8);
return \"subq%.w %#8,%0\;subq%.w %1,%0\";
}
}
}
#endif
......@@ -2430,25 +2430,25 @@
- INTVAL (operands[1]));
return \"subq%.w %1,%0\";
}
/* On everything except the 68000 it is faster to use two
addqw instructions to add a small integer (8 < N <= 16)
/* On everything except the 68000 and 68060 it is faster to use
two addqw instructions to add a small integer (8 < N <= 16)
to an address register. Likewise for subqw. */
if (INTVAL (operands[1]) > 8
&& INTVAL (operands[1]) <= 16
&& ADDRESS_REG_P (operands[0])
&& TARGET_68020)
if (TARGET_68020 && !TARGET_68060 && ADDRESS_REG_P (operands[0]))
{
operands[1] = gen_rtx (CONST_INT, VOIDmode, INTVAL (operands[1]) - 8);
return \"addq%.w %#8,%0\;addq%.w %1,%0\";
}
if (INTVAL (operands[1]) < -8
&& INTVAL (operands[1]) >= -16
&& ADDRESS_REG_P (operands[0])
&& TARGET_68020)
{
operands[1] = gen_rtx (CONST_INT, VOIDmode,
- INTVAL (operands[1]) - 8);
return \"subq%.w %#8,%0\;subq%.w %1,%0\";
if (INTVAL (operands[1]) > 8
&& INTVAL (operands[1]) <= 16)
{
operands[1] = gen_rtx (CONST_INT, VOIDmode,
INTVAL (operands[1]) - 8);
return \"addq%.w %#8,%0\;addq%.w %1,%0\";
}
if (INTVAL (operands[1]) < -8
&& INTVAL (operands[1]) >= -16)
{
operands[1] = gen_rtx (CONST_INT, VOIDmode,
- INTVAL (operands[1]) - 8);
return \"subq%.w %#8,%0\;subq%.w %1,%0\";
}
}
}
#endif
......@@ -6331,13 +6331,15 @@
rtx xoperands[2];
xoperands[0] = stack_pointer_rtx;
xoperands[1] = gen_rtx (CONST_INT, VOIDmode, INTVAL (operands[0]) - 4);
if (TARGET_5200)
output_asm_insn (\"add%.l %1,%0\", xoperands);
else
#ifndef NO_ADDSUB_Q
if (INTVAL (xoperands[1]) <= 8)
output_asm_insn (\"addq%.w %1,%0\", xoperands);
else if (INTVAL (xoperands[1]) <= 16 && TARGET_68020)
{
if (!TARGET_5200)
output_asm_insn (\"addq%.w %1,%0\", xoperands);
else
output_asm_insn (\"addq%.l %1,%0\", xoperands);
}
else if (INTVAL (xoperands[1]) <= 16 && TARGET_68020 && !TARGET_68060)
{
xoperands[1] = gen_rtx (CONST_INT, VOIDmode,
INTVAL (xoperands[1]) - 8);
......@@ -6345,7 +6347,7 @@
}
else
#endif
if (INTVAL (xoperands[1]) <= 0x7FFF)
if (INTVAL (xoperands[1]) <= 0x7FFF && !TARGET_5200)
output_asm_insn (\"add%.w %1,%0\", xoperands);
else
output_asm_insn (\"add%.l %1,%0\", xoperands);
......@@ -6371,13 +6373,15 @@
rtx xoperands[2];
xoperands[0] = stack_pointer_rtx;
xoperands[1] = gen_rtx (CONST_INT, VOIDmode, INTVAL (operands[0]) - 4);
if (TARGET_5200)
output_asm_insn (\"add%.l %1,%0\", xoperands);
else
#ifndef NO_ADDSUB_Q
if (INTVAL (xoperands[1]) <= 8)
output_asm_insn (\"addq%.w %1,%0\", xoperands);
else if (INTVAL (xoperands[1]) <= 16 && TARGET_68020)
{
if (!TARGET_5200)
output_asm_insn (\"addq%.w %1,%0\", xoperands);
else
output_asm_insn (\"addq%.l %1,%0\", xoperands);
}
else if (INTVAL (xoperands[1]) <= 16 && TARGET_68020 && !TARGET_68060)
{
xoperands[1] = gen_rtx (CONST_INT, VOIDmode,
INTVAL (xoperands[1]) - 8);
......@@ -6385,7 +6389,7 @@
}
else
#endif
if (INTVAL (xoperands[1]) <= 0x7FFF)
if (INTVAL (xoperands[1]) <= 0x7FFF && !TARGET_5200)
output_asm_insn (\"add%.w %1,%0\", xoperands);
else
output_asm_insn (\"add%.l %1,%0\", xoperands);
......@@ -6437,7 +6441,7 @@
|| GET_CODE (operands[0]) == MEM)
/* clr insns on 68000 read before writing.
This isn't so on the 68010, but we have no TARGET_68010. */
&& (TARGET_68020
&& ((TARGET_68020 || TARGET_5200)
|| !(GET_CODE (operands[0]) == MEM
&& MEM_VOLATILE_P (operands[0]))))
return \"clr%.w %0\";
......
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