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riscv-gcc-1
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lvzhengyang
riscv-gcc-1
Commits
6ca30df6
Commit
6ca30df6
authored
Dec 21, 1999
by
Michael Hayes
Committed by
Michael Hayes
Dec 21, 1999
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* md.texi: Add c4x constraints documentation.
From-SVN: r31049
parent
eda190c5
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gcc/ChangeLog
View file @
6ca30df6
1999
-
12
-
21
Michael
Hayes
<
m
.
hayes
@elec
.
canterbury
.
ac
.
nz
>
*
md
.
texi
:
Add
c4x
constraints
documentation
.
1999
-
12
-
21
Martin
v
.
Lwis
<
loewis
@informatik
.
hu
-
berlin
.
de
>
*
config
/
i386
/
dgux
.
c
(
struct
option
)
:
Rename
to
...
...
gcc/md.texi
View file @
6ca30df6
...
...
@@ -1640,6 +1640,89 @@ Memory address aligned to an 8-byte boundary
@item
U
Even
register
@end
table
@item
TMS320C3x
/
C4x
---
@file{
c4x
.
h
}
@table
@code
@item
a
Auxiliary
(
address
)
register
(
ar0
-
ar7
)
@item
b
Stack
pointer
register
(
sp
)
@item
c
Standard
(
32
bit
)
precision
integer
register
@item
f
Extended
(
40
bit
)
precision
register
(
r0
-
r11
)
@item
k
Block
count
register
(
bk
)
@item
q
Extended
(
40
bit
)
precision
low
register
(
r0
-
r7
)
@item
t
Extended
(
40
bit
)
precision
register
(
r0
-
r1
)
@item
u
Extended
(
40
bit
)
precision
register
(
r2
-
r3
)
@item
v
Repeat
count
register
(
rc
)
@item
x
Index
register
(
ir0
-
ir1
)
@item
y
Status
(
condition
code
)
register
(
st
)
@item
z
Data
page
register
(
dp
)
@item
G
Floating
-
point
zero
@item
H
Immediate
16
bit
floating
-
point
constant
@item
I
Signed
16
bit
constant
@item
J
Signed
8
bit
constant
@item
K
Signed
5
bit
constant
@item
L
Unsigned
16
bit
constant
@item
M
Unsigned
8
bit
constant
@item
N
Ones
complement
of
unsigned
16
bit
constant
@item
O
High
16
bit
constant
(
32
bit
constant
with
16
LSBs
zero
)
@item
Q
Indirect
memory
reference
with
signed
8
bit
or
index
register
displacement
@item
R
Indirect
memory
reference
with
unsigned
5
bit
displacement
@item
S
Indirect
memory
reference
with
1
bit
or
index
register
displacement
@item
T
Direct
memory
reference
@item
U
Symbolic
address
@end
table
@end
table
...
...
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