iterators.md (V_cmp_mixed, [...]): New.

	* config/aarch64/iterators.md (V_cmp_mixed, v_cmp_mixed): New.
	* config/aarch64/aarch64-simd.md (<su><maxmin>v2di3): Call
	gen_vcondv2div2di instead of gen_aarch64_vcond_internalv2div2di.
	(aarch64_vcond_internal<mode><mode>): Delete pattern.
	(aarch64_vcond_internal<VDQF_COND:mode><VDQF:mode>): Ditto.
	(vcond<v_cmp_result><mode>): Ditto.
	(vcond<mode><mode>): Re-implement using vec_cmp and vcond_mask.
	(vcondu<mode><mode>): Ditto.
	(vcond<v_cmp_mixed><mode>): New pattern.
	(vcondu<mode><v_cmp_mixed>): New pattern.
	(aarch64_cmtst<mode>): Revise comment using aarch64_vcond instead
	of aarch64_vcond_internal.

	gcc/testsuite
	* gcc.target/aarch64/simd/vcond-ne.c: New test.

From-SVN: r239328

gcc/ChangeLog

@@ -2,6 +2,23 @@
 	    Renlin Li  <renlin.li@arm.com>
 	    Bin Cheng  <bin.cheng@arm.com>
 
+	* config/aarch64/iterators.md (V_cmp_mixed, v_cmp_mixed): New.
+	* config/aarch64/aarch64-simd.md (<su><maxmin>v2di3): Call
+	gen_vcondv2div2di instead of gen_aarch64_vcond_internalv2div2di.
+	(aarch64_vcond_internal<mode><mode>): Delete pattern.
+	(aarch64_vcond_internal<VDQF_COND:mode><VDQF:mode>): Ditto.
+	(vcond<v_cmp_result><mode>): Ditto.
+	(vcond<mode><mode>): Re-implement using vec_cmp and vcond_mask.
+	(vcondu<mode><mode>): Ditto.
+	(vcond<v_cmp_mixed><mode>): New pattern.
+	(vcondu<mode><v_cmp_mixed>): New pattern.
+	(aarch64_cmtst<mode>): Revise comment using aarch64_vcond instead
+	of aarch64_vcond_internal.
+
+2016-08-10  Alan Lawrence  <alan.lawrence@arm.com>
+	    Renlin Li  <renlin.li@arm.com>
+	    Bin Cheng  <bin.cheng@arm.com>
+
 	* config/aarch64/aarch64-simd.md (vec_cmp<mode><mode>): New pattern.
 	(vec_cmp<mode><v_cmp_result>): New pattern.
 	(vec_cmpu<mode><mode>): New pattern.

gcc/config/aarch64/iterators.md

@@ -662,6 +662,16 @@
 				(V2DF "v2di") (DF    "di")
 				(SF   "si")])
 
+;; Mode for vector conditional operations where the comparison has
+;; different type from the lhs.
+(define_mode_attr V_cmp_mixed [(V2SI "V2SF") (V4SI "V4SF")
+			       (V2DI "V2DF") (V2SF "V2SI")
+			       (V4SF "V4SI") (V2DF "V2DI")])
+
+(define_mode_attr v_cmp_mixed [(V2SI "v2sf") (V4SI "v4sf")
+			       (V2DI "v2df") (V2SF "v2si")
+			       (V4SF "v4si") (V2DF "v2di")])
+
 ;; Lower case element modes (as used in shift immediate patterns).
 (define_mode_attr ve_mode [(V8QI "qi") (V16QI "qi")
 			   (V4HI "hi") (V8HI  "hi")

gcc/testsuite/ChangeLog

+2016-08-10  Bin Cheng  <bin.cheng@arm.com>
+
+	* gcc.target/aarch64/simd/vcond-ne.c: New test.
+
 2016-08-10  Michael Meissner  <meissner@linux.vnet.ibm.com>
 
 	PR target/72853

gcc/testsuite/gcc.target/aarch64/simd/vcond-ne.c

+/* { dg-do compile } */
+/* { dg-require-effective-target vect_int } */
+/* { dg-require-effective-target vect_float } */
+/* { dg-require-effective-target vect_condition } */
+
+float a,b,c;
+
+float z[1024]; int ok[1024];
+
+void foo()
+{
+  int i;
+
+  for (i=0; i!=1024; ++i)
+    {
+      float rR = a*z[i];
+      float rL = b*z[i];
+      float rMin = (rR!=rL) ? rR : 0.0;
+      ok[i] = rMin-c;
+    }
+}
+
+/* { dg-final { scan-assembler-not "\[ \t\]not\[ \t\]" } } */