mn10300.c (expand_prologue): End the current sequence before counting the tst…

mn10300.c (expand_prologue): End the current sequence before counting the tst insns in the current function.

        * mn10300.c (expand_prologue): End the current sequence before
        counting the tst insns in the current function.  Start a new
        one before emitting any prologue instructions.

        * mn10300.h (REGISTER_MOVE_COST): Bump up cost of moves in the
        same class.

        * mn10300.md (untyped_call): New expander.

From-SVN: r13955

gcc/config/mn10300/mn10300.c

@@ -419,6 +419,11 @@ expand_prologue ()
 {
   unsigned int size;
 
+  /* We need to end the current sequence so that count_tst_insns can
+     look at all the insns in this function.  Normally this would be
+     unsafe, but it's OK in the prologue/epilogue expanders.  */
+  end_sequence ();
+
   /* Determine if it is profitable to put the value zero into a register
      for the entire function.  If so, set ZERO_DREG and ZERO_AREG.  */
   if (regs_ever_live[2] || regs_ever_live[3]
@@ -475,6 +480,9 @@ expand_prologue ()
       zero_areg = NULL_RTX;
     }
 
+  /* Start a new sequence.  */
+  start_sequence ();
+
   /* SIZE includes the fixed stack space needed for function calls.  */
   size = get_frame_size () + current_function_outgoing_args_size;
   size += (current_function_outgoing_args_size ? 4 : 0);

gcc/config/mn10300/mn10300.h

@@ -743,7 +743,7 @@ extern struct rtx_def *mn10300_builtin_saveregs ();
     return 8;
 
 
-#define REGISTER_MOVE_COST(CLASS1, CLASS2)  (CLASS1 != CLASS2 ? 4 : 0)
+#define REGISTER_MOVE_COST(CLASS1, CLASS2)  (CLASS1 != CLASS2 ? 4 : 2)
 
 /* A crude cut at RTX_COSTS for the MN10300.  */
 

gcc/config/mn10300/mn10300.md

@@ -1234,6 +1234,26 @@
   "calls %C1"
   [(set_attr "cc" "clobber")])
 
+(define_expand "untyped_call"
+  [(parallel [(call (match_operand 0 "" "")
+                    (const_int 0))
+              (match_operand 1 "" "")
+              (match_operand 2 "" "")])]
+  ""
+  "
+{
+  int i;
+
+  emit_call_insn (gen_call (operands[0], const0_rtx));
+
+  for (i = 0; i < XVECLEN (operands[2], 0); i++)
+    {
+      rtx set = XVECEXP (operands[2], 0, i);
+      emit_move_insn (SET_DEST (set), SET_SRC (set));
+    }
+  DONE;
+}")
+
 (define_insn "nop"
   [(const_int 0)]
   ""