c6x.md (collapse-ndfa, [...]): New automata_options.

	* config/c6x/c6x.md (collapse-ndfa, no-comb-vect): New
	automata_options.
	(d1, l1, s1, m1, d2, l2, s2, m2): Changed to define_query_cpu_unit.
	(l1w, s1w, l2w, s2w): Define in the main automaton.
	(fps1, fpl1, adddps1, adddpl1, fps2, fpl2, adddps2, adddpl2): New
	units.
	* config/c6x/c6x.c (c6x_sched_insn_info): Add unit_mask member.
	(c6x_unit_names): Add the new units.
	(c6x_unit_codes): New static array.
	(UNIT_QID_D1, UNIT_QID_L1, UNIT_QID_S1, UNIT_QID_M1, UNIT_QID_FPS1,
	UNIT_QID_FPL1, UNIT_QID_ADDDPS1, UNIT_QID_ADDDPL1,
	UNIT_QID_SIDE_OFFSET): New macros.
	(RESERVATION_S2): Adjust value.
	(c6x_option_override): Compute c6x_unit_codes.
	(assign_reservations): Take the unit_mask of the last instruction
	into account.  Detect floating point reservations by looking for
	the new units.  Don't assign reservations if the field is already
	nonzero.
	(struct c6x_sched_context): Add member prev_cycle_state_ctx.
	(init_sched_state): Initialize it.
	(c6x_clear_sched_context): Free it.
	(insn_set_clock): Clear reservation.
	(prev_cycle_state): New static variable.
	(c6x_init_sched_context): Save it.
	(c6x_sched_init): Allocate space for it and clear it.
	(c6x_sched_dfa_pre_cycle_insn): New static function.
	(c6x_dfa_new_cycle): Save state at the start of a new cycle.
	(c6x_variable_issue): Only record units in the unit_mask that
	were not set at the start of the cycle.
	(c6x_variable_issue): Compute and store the unit_mask from the
	current state.
	(reorg_split_calls): Ensure the new information remains correct.
	(TARGET_SCHED_DFA_NEW_CYCLE, TARGET_SCHED_CLEAR_SCHED_CONTEXT,
	TARGET_SCHED_DFA_PRE_CYCLE_INSN): Define.
	* config/c6x/c6x.h (CPU_UNITS_QUERY): Define.
	* config/c6x/c6x-sched.md.in (fp4_ls_N__CROSS_, adddp_ls_N__CROSS_):
	Add special reservations.
	* config/c6x/c6x-sched.md: Regenerate.

From-SVN: r178488

gcc/ChangeLog

+2011-09-02  Bernd Schmidt  <bernds@codesourcery.com>
+
+	* config/c6x/c6x.md (collapse-ndfa, no-comb-vect): New
+	automata_options.
+	(d1, l1, s1, m1, d2, l2, s2, m2): Changed to define_query_cpu_unit.
+	(l1w, s1w, l2w, s2w): Define in the main automaton.
+	(fps1, fpl1, adddps1, adddpl1, fps2, fpl2, adddps2, adddpl2): New
+	units.
+	* config/c6x/c6x.c (c6x_sched_insn_info): Add unit_mask member.
+	(c6x_unit_names): Add the new units.
+	(c6x_unit_codes): New static array.
+	(UNIT_QID_D1, UNIT_QID_L1, UNIT_QID_S1, UNIT_QID_M1, UNIT_QID_FPS1,
+	UNIT_QID_FPL1, UNIT_QID_ADDDPS1, UNIT_QID_ADDDPL1,
+	UNIT_QID_SIDE_OFFSET): New macros.
+	(RESERVATION_S2): Adjust value.
+	(c6x_option_override): Compute c6x_unit_codes.
+	(assign_reservations): Take the unit_mask of the last instruction
+	into account.  Detect floating point reservations by looking for
+	the new units.  Don't assign reservations if the field is already
+	nonzero.
+	(struct c6x_sched_context): Add member prev_cycle_state_ctx.
+	(init_sched_state): Initialize it.
+	(c6x_clear_sched_context): Free it.
+	(insn_set_clock): Clear reservation.
+	(prev_cycle_state): New static variable.
+	(c6x_init_sched_context): Save it.
+	(c6x_sched_init): Allocate space for it and clear it.
+	(c6x_sched_dfa_pre_cycle_insn): New static function.
+	(c6x_dfa_new_cycle): Save state at the start of a new cycle.
+	(c6x_variable_issue): Only record units in the unit_mask that
+	were not set at the start of the cycle.
+	(c6x_variable_issue): Compute and store the unit_mask from the
+	current state.
+	(reorg_split_calls): Ensure the new information remains correct.
+	(TARGET_SCHED_DFA_NEW_CYCLE, TARGET_SCHED_CLEAR_SCHED_CONTEXT,
+	TARGET_SCHED_DFA_PRE_CYCLE_INSN): Define.
+	* config/c6x/c6x.h (CPU_UNITS_QUERY): Define.
+	* config/c6x/c6x-sched.md.in (fp4_ls_N__CROSS_, adddp_ls_N__CROSS_):
+	Add special reservations.
+	* config/c6x/c6x-sched.md: Regenerate.
+
 2011-09-02  Martin Jambor  <mjambor@suse.cz>
 
 	* ipa-prop.h (ipa_node_params): Removed fields

gcc/config/c6x/c6x-sched.md

@@ -183,14 +183,14 @@
        (and (eq_attr "cross" "n")
 	    (and (eq_attr "units" "ls")
 		 (eq_attr "dest_regfile" "a"))))
-  "(s1,nothing*2,s1w)|(l1,nothing*2,l1w)")
+  "(fps1+s1,nothing*2,s1w)|(fpl1+l1,nothing*2,l1w)")
 
 (define_insn_reservation "adddp_ls1n" 7
   (and (eq_attr "type" "adddp")
        (and (eq_attr "cross" "n")
 	    (and (eq_attr "units" "ls")
 		 (eq_attr "dest_regfile" "a"))))
-  "((s1)*2,nothing*3,s1w*2)|((l1)*2,nothing*3,l1w*2)")
+  "(adddps1+(s1)*2,nothing*3,s1w*2)|(adddpl1+(l1)*2,nothing*3,l1w*2)")
 
 (define_insn_reservation "single_dls1n" 1
   (and (eq_attr "type" "single")
@@ -416,14 +416,14 @@
        (and (eq_attr "cross" "n")
 	    (and (eq_attr "units" "ls")
 		 (eq_attr "dest_regfile" "b"))))
-  "(s2,nothing*2,s2w)|(l2,nothing*2,l2w)")
+  "(fps2+s2,nothing*2,s2w)|(fpl2+l2,nothing*2,l2w)")
 
 (define_insn_reservation "adddp_ls2n" 7
   (and (eq_attr "type" "adddp")
        (and (eq_attr "cross" "n")
 	    (and (eq_attr "units" "ls")
 		 (eq_attr "dest_regfile" "b"))))
-  "((s2)*2,nothing*3,s2w*2)|((l2)*2,nothing*3,l2w*2)")
+  "(adddps2+(s2)*2,nothing*3,s2w*2)|(adddpl2+(l2)*2,nothing*3,l2w*2)")
 
 (define_insn_reservation "single_dls2n" 1
   (and (eq_attr "type" "single")
@@ -649,14 +649,14 @@
        (and (eq_attr "cross" "y")
 	    (and (eq_attr "units" "ls")
 		 (eq_attr "dest_regfile" "a"))))
-  "(s1+x1,nothing*2,s1w)|(l1+x1,nothing*2,l1w)")
+  "(fps1+s1+x1,nothing*2,s1w)|(fpl1+l1+x1,nothing*2,l1w)")
 
 (define_insn_reservation "adddp_ls1y" 7
   (and (eq_attr "type" "adddp")
        (and (eq_attr "cross" "y")
 	    (and (eq_attr "units" "ls")
 		 (eq_attr "dest_regfile" "a"))))
-  "((s1+x1)*2,nothing*3,s1w*2)|((l1+x1)*2,nothing*3,l1w*2)")
+  "(adddps1+(s1+x1)*2,nothing*3,s1w*2)|(adddpl1+(l1+x1)*2,nothing*3,l1w*2)")
 
 (define_insn_reservation "single_dls1y" 1
   (and (eq_attr "type" "single")
@@ -882,14 +882,14 @@
        (and (eq_attr "cross" "y")
 	    (and (eq_attr "units" "ls")
 		 (eq_attr "dest_regfile" "b"))))
-  "(s2+x2,nothing*2,s2w)|(l2+x2,nothing*2,l2w)")
+  "(fps2+s2+x2,nothing*2,s2w)|(fpl2+l2+x2,nothing*2,l2w)")
 
 (define_insn_reservation "adddp_ls2y" 7
   (and (eq_attr "type" "adddp")
        (and (eq_attr "cross" "y")
 	    (and (eq_attr "units" "ls")
 		 (eq_attr "dest_regfile" "b"))))
-  "((s2+x2)*2,nothing*3,s2w*2)|((l2+x2)*2,nothing*3,l2w*2)")
+  "(adddps2+(s2+x2)*2,nothing*3,s2w*2)|(adddpl2+(l2+x2)*2,nothing*3,l2w*2)")
 
 (define_insn_reservation "single_dls2y" 1
   (and (eq_attr "type" "single")

gcc/config/c6x/c6x-sched.md.in

@@ -178,14 +178,14 @@
        (and (eq_attr "cross" "_CROSS_")
 	    (and (eq_attr "units" "ls")
 		 (eq_attr "dest_regfile" "_RF_"))))
-  "(s_N__CUNIT_,nothing*2,s_N_w)|(l_N__CUNIT_,nothing*2,l_N_w)")
+  "(fps_N_+s_N__CUNIT_,nothing*2,s_N_w)|(fpl_N_+l_N__CUNIT_,nothing*2,l_N_w)")
 
 (define_insn_reservation "adddp_ls_N__CROSS_" 7
   (and (eq_attr "type" "adddp")
        (and (eq_attr "cross" "_CROSS_")
 	    (and (eq_attr "units" "ls")
 		 (eq_attr "dest_regfile" "_RF_"))))
-  "((s_N__CUNIT_)*2,nothing*3,s_N_w*2)|((l_N__CUNIT_)*2,nothing*3,l_N_w*2)")
+  "(adddps_N_+(s_N__CUNIT_)*2,nothing*3,s_N_w*2)|(adddpl_N_+(l_N__CUNIT_)*2,nothing*3,l_N_w*2)")
 
 (define_insn_reservation "single_dls_N__CROSS_" 1
   (and (eq_attr "type" "single")

gcc/config/c6x/c6x.h

@@ -612,6 +612,8 @@ do {									\
 #define Pmode SImode
 #define FUNCTION_MODE QImode
 
+#define CPU_UNITS_QUERY 1
+
 extern int c6x_initial_flag_pic;
 
 #endif /* GCC_C6X_H */

gcc/config/c6x/c6x.md

@@ -242,21 +242,27 @@
 	]
 	(const_string "unknown")))
 
-(define_automaton "c6x_1,c6x_w1,c6x_2,c6x_w2,c6x_m1,c6x_m2,c6x_t1,c6x_t2,c6x_branch")
+(define_automaton "c6x_1,c6x_2,c6x_m1,c6x_m2,c6x_t1,c6x_t2,c6x_branch")
+(automata_option "no-comb-vect")
 (automata_option "ndfa")
+(automata_option "collapse-ndfa")
 
-(define_cpu_unit "d1,l1,s1" "c6x_1")
+(define_query_cpu_unit "d1,l1,s1" "c6x_1")
 (define_cpu_unit "x1" "c6x_1")
-(define_cpu_unit "l1w,s1w" "c6x_w1")
-(define_cpu_unit "m1" "c6x_m1")
+(define_cpu_unit "l1w,s1w" "c6x_1")
+(define_query_cpu_unit "m1" "c6x_m1")
 (define_cpu_unit "m1w" "c6x_m1")
 (define_cpu_unit "t1" "c6x_t1")
-(define_cpu_unit "d2,l2,s2" "c6x_2")
+(define_query_cpu_unit "d2,l2,s2" "c6x_2")
 (define_cpu_unit "x2" "c6x_2")
-(define_cpu_unit "l2w,s2w" "c6x_w2")
-(define_cpu_unit "m2" "c6x_m2")
+(define_cpu_unit "l2w,s2w" "c6x_2")
+(define_query_cpu_unit "m2" "c6x_m2")
 (define_cpu_unit "m2w" "c6x_m2")
 (define_cpu_unit "t2" "c6x_t2")
+;; A special set of units used to identify specific reservations, rather than
+;; just units.
+(define_query_cpu_unit "fps1,fpl1,adddps1,adddpl1" "c6x_1")
+(define_query_cpu_unit "fps2,fpl2,adddps2,adddpl2" "c6x_2")
 
 ;; There can be up to two branches in one cycle (on the .s1 and .s2
 ;; units), but some instructions must not be scheduled in parallel