Commit 6b9a302f by Vladimir Makarov Committed by Vladimir Makarov

re PR target/82444 (ICE in ira_init_register_move_cost, at ira.c:1581)

2018-01-31  Vladimir Makarov  <vmakarov@redhat.com>

	PR target/82444
	* ira.c (ira_init_register_move_cost): Remove assert.

2018-01-31  Vladimir Makarov  <vmakarov@redhat.com>

	PR target/82444
	* gcc.target/i386/pr82444.c: New.

From-SVN: r257254
parent f1aa1f93
2018-01-31 Vladimir Makarov <vmakarov@redhat.com>
PR target/82444
* ira.c (ira_init_register_move_cost): Remove assert.
2018-01-31 Eric Botcazou <ebotcazou@adacore.com> 2018-01-31 Eric Botcazou <ebotcazou@adacore.com>
PR rtl-optimization/84071 PR rtl-optimization/84071
......
...@@ -1578,7 +1578,8 @@ ira_init_register_move_cost (machine_mode mode) ...@@ -1578,7 +1578,8 @@ ira_init_register_move_cost (machine_mode mode)
ira_assert (ira_register_move_cost[mode] == NULL ira_assert (ira_register_move_cost[mode] == NULL
&& ira_may_move_in_cost[mode] == NULL && ira_may_move_in_cost[mode] == NULL
&& ira_may_move_out_cost[mode] == NULL); && ira_may_move_out_cost[mode] == NULL);
ira_assert (have_regs_of_mode[mode]); /* have_regs_of_mode[mode] might be false because it might be
E_<mode> (see genmodes) of pseudo with <mode>. */
for (cl1 = 0; cl1 < N_REG_CLASSES; cl1++) for (cl1 = 0; cl1 < N_REG_CLASSES; cl1++)
for (cl2 = 0; cl2 < N_REG_CLASSES; cl2++) for (cl2 = 0; cl2 < N_REG_CLASSES; cl2++)
{ {
......
2018-01-31 Vladimir Makarov <vmakarov@redhat.com>
PR target/82444
* gcc.target/i386/pr82444.c: New.
2018-01-31 Will Schmidt <will_schmidt@vnet.ibm.com> 2018-01-31 Will Schmidt <will_schmidt@vnet.ibm.com>
* gcc.target/powerpc/altivec-13.c: Remove VSX-requiring built-ins. * gcc.target/powerpc/altivec-13.c: Remove VSX-requiring built-ins.
......
/* { dg-do compile { target { ia32 } } } */
/* { dg-options "-march=athlon" } */
__float128 a;
void b () { __asm__("" : "+r"(a)); } /* { dg-error "inconsistent operand constraints in an" } */
Markdown is supported
0% or
You are about to add 0 people to the discussion. Proceed with caution.
Finish editing this message first!
Please register or to comment