Commit 6b29b0e2 by John Wehle Committed by John Wehle

rtl.def (COND_EXEC): Clarify.

	* rtl.def (COND_EXEC): Clarify.

	* i386.md (extendsidi2): Clobber (reg:CC 17) in the
	same fashion as zero_extendsidi2.

From-SVN: r33756
parent ee455968
Sun May 7 00:54:57 EDT 2000 John Wehle (john@feith.com)
* rtl.def (COND_EXEC): Clarify.
* i386.md (extendsidi2): Clobber (reg:CC 17) in the
same fashion as zero_extendsidi2.
2000-05-06 Richard Henderson <rth@cygnus.com>
* config/ia64/ia64.c (predicate_operator): New.
......
......@@ -2642,8 +2642,8 @@
(define_insn "extendsidi2"
[(set (match_operand:DI 0 "nonimmediate_operand" "=*A,r,?r,?*o")
(sign_extend:DI (match_operand:SI 1 "register_operand" "0,0,r,r")))
(clobber (match_scratch:SI 2 "=X,X,X,&r"))
(clobber (reg:CC 17))]
(clobber (reg:CC 17))
(clobber (match_scratch:SI 2 "=X,X,X,&r"))]
""
"#")
......@@ -2651,8 +2651,8 @@
(define_split
[(set (match_operand:DI 0 "memory_operand" "")
(sign_extend:DI (match_operand:SI 1 "register_operand" "")))
(clobber (match_operand:SI 2 "register_operand" ""))
(clobber (reg:CC 17))]
(clobber (reg:CC 17))
(clobber (match_operand:SI 2 "register_operand" ""))]
"(reload_completed
&& dead_or_set_p (insn, operands[1])
&& !reg_mentioned_p (operands[1], operands[0]))"
......@@ -2666,8 +2666,8 @@
(define_split
[(set (match_operand:DI 0 "memory_operand" "")
(sign_extend:DI (match_operand:SI 1 "register_operand" "")))
(clobber (match_operand:SI 2 "register_operand" ""))
(clobber (reg:CC 17))]
(clobber (reg:CC 17))
(clobber (match_operand:SI 2 "register_operand" ""))]
"reload_completed"
[(const_int 0)]
"
......@@ -2697,8 +2697,8 @@
(define_split
[(set (match_operand:DI 0 "register_operand" "")
(sign_extend:DI (match_operand:SI 1 "register_operand" "")))
(clobber (match_scratch:SI 2 ""))
(clobber (reg:CC 17))]
(clobber (reg:CC 17))
(clobber (match_scratch:SI 2 ""))]
"reload_completed"
[(const_int 0)]
"
......
......@@ -434,7 +434,16 @@ DEF_RTL_EXPR(NOTE, "note", "iuu0n", 'x')
Top level constituents of INSN, JUMP_INSN and CALL_INSN.
---------------------------------------------------------------------- */
/* Several operations to be done in parallel. */
/* Conditionally execute code.
Operand 0 is the condition that if true, the code is executed.
Operand 1 is the code to be executed (typically a SET).
Semantics are that there are no side effects if the condition
is false. This pattern is created automatically by the if_convert
pass run after reload or by target-specific splitters. */
DEF_RTL_EXPR(COND_EXEC, "cond_exec", "ee", 'x')
/* Several operations to be done in parallel (perhaps under COND_EXEC). */
DEF_RTL_EXPR(PARALLEL, "parallel", "E", 'x')
/* A string that is passed through to the assembler as input.
......@@ -936,13 +945,6 @@ DEF_RTL_EXPR(CALL_PLACEHOLDER, "call_placeholder", "uuuu", 'x')
of canonical RTL. It is, however, easier to manipulate this way. */
DEF_RTL_EXPR(PHI, "phi", "E", 'x')
/* Conditionally execute code.
Operand 0 is the condition that if true, the code is executed.
Operand 1 is the code to be executed (typically a SET).
Semantics are that there are no side effects if the condition
is false. */
DEF_RTL_EXPR(COND_EXEC, "cond_exec", "ee", 'x')
/*
Local variables:
......
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