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lvzhengyang
riscv-gcc-1
Commits
6967a126
Commit
6967a126
authored
22 years ago
by
Kazu Hirata
Committed by
Kazu Hirata
22 years ago
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* config/h8300/h8300.md (a peephole2): New.
From-SVN: r63719
parent
1f7e8790
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gcc/ChangeLog
View file @
6967a126
2003
-
03
-
03
Kazu
Hirata
<
kazu
@cs
.
umass
.
edu
>
*
config
/
h8300
/
h8300
.
md
(
a
peephole2
)
:
New
.
2003
-
03
-
03
Kazu
Hirata
<
kazu
@cs
.
umass
.
edu
>
*
config
/
h8300
/
h8300
.
md
(
*
extzv_8_8
)
:
Use
shorter
code
when
operands
[
0
]
and
operands
[
1
]
are
different
.
...
...
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gcc/config/h8300/h8300.md
View file @
6967a126
...
...
@@ -3561,6 +3561,23 @@
? gen_rtx_GE (VOIDmode, cc0_rtx, const0_rtx)
: gen_rtx_LT (VOIDmode, cc0_rtx, const0_rtx));")
(define_peephole2
[
(set (match_operand:SI 0 "register_operand" "")
(match_operand:SI 1 "register_operand" ""))
(set (match_dup 0)
(and:SI (match_dup 0)
(const_int 255)))]
"(TARGET_H8300H || TARGET_H8300S)
&& REG_P (operands
[
0
]
)
&& REG_P (operands
[
1
]
)
&& REGNO (operands
[
0
]
) != REGNO (operands
[
1
]
)"
[
(set (match_dup 0)
(const_int 0))
(set (strict_low_part (match_dup 2))
(match_dup 3))]
"operands
[
2
]
= gen_rtx_REG (QImode, REGNO (operands
[
0
]
));
operands
[
3
]
= gen_rtx_REG (QImode, REGNO (operands
[
1
]
));")
;; (compare (reg:SI) (const_int)) takes 6 bytes, so we try to achieve
;; the equivalent with shorter sequences. Here is the summary. Cases
;; are grouped for each define_peephole2.
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