Commit 68ae229a by John David Anglin Committed by John David Anglin

re PR target/32847 (FAIL: tmpdir-g++.dg-struct-layout-1/t028 cp_compat_y_tst.o compile, (ICE))

	PR target/32847
        * pa.md (casesi32): Use match_scratch.  Revise insn condition.
	(casesi32p, casesi64p): Likewise.
	(casesi): Adjust for above.

From-SVN: r127096
parent 1c1d80ee
2007-07-31 John David Anglin <dave.anglin@nrc-cnrc.gc.ca>
PR target/32847
* pa.md (casesi32): Use match_scratch. Revise insn condition.
(casesi32p, casesi64p): Likewise.
(casesi): Adjust for above.
2007-07-31 Richard Sandiford <richard@codesourcery.com> 2007-07-31 Richard Sandiford <richard@codesourcery.com>
* mode-switching.c (create_pre_exit): Don't search past calls. * mode-switching.c (create_pre_exit): Don't search past calls.
......
...@@ -7626,27 +7626,11 @@ ...@@ -7626,27 +7626,11 @@
if (TARGET_BIG_SWITCH) if (TARGET_BIG_SWITCH)
{ {
if (TARGET_64BIT) if (TARGET_64BIT)
{ emit_jump_insn (gen_casesi64p (operands[0], operands[3]));
rtx tmp1 = gen_reg_rtx (DImode); else if (flag_pic)
rtx tmp2 = gen_reg_rtx (DImode); emit_jump_insn (gen_casesi32p (operands[0], operands[3]));
emit_jump_insn (gen_casesi64p (operands[0], operands[3],
tmp1, tmp2));
}
else else
{ emit_jump_insn (gen_casesi32 (operands[0], operands[3]));
rtx tmp1 = gen_reg_rtx (SImode);
if (flag_pic)
{
rtx tmp2 = gen_reg_rtx (SImode);
emit_jump_insn (gen_casesi32p (operands[0], operands[3],
tmp1, tmp2));
}
else
emit_jump_insn (gen_casesi32 (operands[0], operands[3], tmp1));
}
} }
else else
emit_jump_insn (gen_casesi0 (operands[0], operands[3])); emit_jump_insn (gen_casesi0 (operands[0], operands[3]));
...@@ -7673,8 +7657,8 @@ ...@@ -7673,8 +7657,8 @@
(mult:SI (match_operand:SI 0 "register_operand" "r") (mult:SI (match_operand:SI 0 "register_operand" "r")
(const_int 4)) (const_int 4))
(label_ref (match_operand 1 "" ""))))) (label_ref (match_operand 1 "" "")))))
(clobber (match_operand:SI 2 "register_operand" "=&r"))] (clobber (match_scratch:SI 2 "=&r"))]
"!TARGET_64BIT && TARGET_BIG_SWITCH" "!flag_pic"
"ldil L'%l1,%2\;ldo R'%l1(%2),%2\;{ldwx|ldw},s %0(%2),%2\;bv,n %%r0(%2)" "ldil L'%l1,%2\;ldo R'%l1(%2),%2\;{ldwx|ldw},s %0(%2),%2\;bv,n %%r0(%2)"
[(set_attr "type" "multi") [(set_attr "type" "multi")
(set_attr "length" "16")]) (set_attr "length" "16")])
...@@ -7685,9 +7669,9 @@ ...@@ -7685,9 +7669,9 @@
(mult:SI (match_operand:SI 0 "register_operand" "r") (mult:SI (match_operand:SI 0 "register_operand" "r")
(const_int 4)) (const_int 4))
(label_ref (match_operand 1 "" ""))))) (label_ref (match_operand 1 "" "")))))
(clobber (match_operand:SI 2 "register_operand" "=&a")) (clobber (match_scratch:SI 2 "=&r"))
(clobber (match_operand:SI 3 "register_operand" "=&r"))] (clobber (match_scratch:SI 3 "=&r"))]
"!TARGET_64BIT && TARGET_BIG_SWITCH" "flag_pic"
"{bl .+8,%2\;depi 0,31,2,%2|mfia %2}\;ldo {16|20}(%2),%2\;\ "{bl .+8,%2\;depi 0,31,2,%2|mfia %2}\;ldo {16|20}(%2),%2\;\
{ldwx|ldw},s %0(%2),%3\;{addl|add,l} %2,%3,%3\;bv,n %%r0(%3)" {ldwx|ldw},s %0(%2),%3\;{addl|add,l} %2,%3,%3\;bv,n %%r0(%3)"
[(set_attr "type" "multi") [(set_attr "type" "multi")
...@@ -7703,9 +7687,9 @@ ...@@ -7703,9 +7687,9 @@
(match_operand:SI 0 "register_operand" "r")) (match_operand:SI 0 "register_operand" "r"))
(const_int 8)) (const_int 8))
(label_ref (match_operand 1 "" ""))))) (label_ref (match_operand 1 "" "")))))
(clobber (match_operand:DI 2 "register_operand" "=&r")) (clobber (match_scratch:DI 2 "=&r"))
(clobber (match_operand:DI 3 "register_operand" "=&r"))] (clobber (match_scratch:DI 3 "=&r"))]
"TARGET_64BIT && TARGET_BIG_SWITCH" ""
"mfia %2\;ldo 24(%2),%2\;ldw,s %0(%2),%3\;extrd,s %3,63,32,%3\;\ "mfia %2\;ldo 24(%2),%2\;ldw,s %0(%2),%3\;extrd,s %3,63,32,%3\;\
add,l %2,%3,%3\;bv,n %%r0(%3)" add,l %2,%3,%3\;bv,n %%r0(%3)"
[(set_attr "type" "multi") [(set_attr "type" "multi")
......
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