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riscv-gcc-1
Commit 68882f0f by Jakub Jelinek Committed by Jakub Jelinek
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v850.c (v850_reorg): Only call alter_subreg on REG or MEM subregs, pass rtx * instead of rtx to it. 

	* config/v850/v850.c (v850_reorg): Only call alter_subreg on
	REG or MEM subregs, pass rtx * instead of rtx to it.
	* config/i860/i860.c (output_delayed_branch, output_delay_insn): Pass
	rtx * instead of rtx to alter_subreg.
	* config/m32r/m32r.c (gen_split_move_double): Likewise.
	* config/pj/pj.c (pj_output_rval): Likewise.

From-SVN: r51182
parent 648fe28b
Showing with 26 additions and 14 deletions
gcc/ChangeLog
2002-03-22 Jakub Jelinek <jakub@redhat.com>
* config/v850/v850.c (v850_reorg): Only call alter_subreg on
REG or MEM subregs, pass rtx * instead of rtx to it.
* config/i860/i860.c (output_delayed_branch, output_delay_insn): Pass
rtx * instead of rtx to alter_subreg.
* config/m32r/m32r.c (gen_split_move_double): Likewise.
* config/pj/pj.c (pj_output_rval): Likewise.
2002-03-22 Richard Henderson <rth@redhat.com>
PR target/3177
......
gcc/config/i860/i860.c
/* Subroutines for insn-output.c for Intel 860
Copyright (C) 1989, 1991, 1997, 1998, 1999, 2000, 2001
Copyright (C) 1989, 1991, 1997, 1998, 1999, 2000, 2001, 2002
Free Software Foundation, Inc.
Derived from sparc.c.
......@@ -1470,7 +1470,7 @@ output_delayed_branch (template, operands, insn)
for (i = 0; i < insn_data[insn_code_number].n_operands; i++)
{
if (GET_CODE (recog_data.operand[i]) == SUBREG)
recog_data.operand[i] = alter_subreg (recog_data.operand[i]);
alter_subreg (&recog_data.operand[i]);
}
insn_extract (delay_insn);
......@@ -1511,7 +1511,7 @@ output_delay_insn (delay_insn)
for (i = 0; i < insn_data[insn_code_number].n_operands; i++)
{
if (GET_CODE (recog_data.operand[i]) == SUBREG)
recog_data.operand[i] = alter_subreg (recog_data.operand[i]);
alter_subreg (&recog_data.operand[i]);
}
if (! constrain_operands (1))
......
gcc/config/m32r/m32r.c
......@@ -1281,9 +1281,9 @@ gen_split_move_double (operands)
subregs to make this code simpler. It is safe to call
alter_subreg any time after reload. */
if (GET_CODE (dest) == SUBREG)
dest = alter_subreg (dest);
alter_subreg (&dest);
if (GET_CODE (src) == SUBREG)
src = alter_subreg (src);
alter_subreg (&src);
start_sequence ();
if (GET_CODE (dest) == REG)
......
gcc/config/pj/pj.c
/* Output routines for GCC for picoJava II
Copyright (C) 2000, 2001 Free Software Foundation, Inc.
Copyright (C) 2000, 2001, 2002 Free Software Foundation, Inc.
This file is part of GNU CC.
......@@ -509,7 +509,7 @@ pj_output_rval (op, mode, outer_op)
break;
case SUBREG:
pj_output_rval (alter_subreg (op), mode, outer_op);
pj_output_rval (alter_subreg (&op), mode, outer_op);
break;
case POST_INC:
......
gcc/config/v850/v850.c
/* Subroutines for insn-output.c for NEC V850 series
Copyright (C) 1996, 1997, 1998, 1999, 2000, 2001
Copyright (C) 1996, 1997, 1998, 1999, 2000, 2001, 2002
Free Software Foundation, Inc.
Contributed by Jeff Law (law@cygnus.com).
......@@ -1249,12 +1249,15 @@ void v850_reorg (start_insn)
int unsignedp = FALSE;
/* We might have (SUBREG (MEM)) here, so just get rid of the
subregs to make this code simpler. It is safe to call
alter_subreg any time after reload. */
if (GET_CODE (dest) == SUBREG)
dest = alter_subreg (dest);
if (GET_CODE (src) == SUBREG)
src = alter_subreg (src);
subregs to make this code simpler. */
if (GET_CODE (dest) == SUBREG
&& (GET_CODE (SUBREG_REG (dest)) == MEM
|| GET_CODE (SUBREG_REG (dest)) == REG))
alter_subreg (&dest);
if (GET_CODE (src) == SUBREG
&& (GET_CODE (SUBREG_REG (src)) == MEM
|| GET_CODE (SUBREG_REG (src)) == REG))
alter_subreg (&src);
if (GET_CODE (dest) == MEM && GET_CODE (src) == MEM)
mem = NULL_RTX;
......
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