sparc.h (TARGET_CM_MEDMID): Fix documentation.

	* config/sparc/sparc.h (TARGET_CM_MEDMID): Fix documentation.
	(CASE_VECTOR_MODE): Set to SImode even if PTR64, when MEDLOW and
	not doing pic.
	(ASM_OUTPUT_ADDR_{VEC,DIFF}_ELT): Check CASE_VECTOR_MODE not
	Pmode.
	* config/sparc/sparc.md (tablejump): Likewise, and sign extend op0
	to Pmode if CASE_VECTOR_MODE is something else.

From-SVN: r22344

gcc/ChangeLog

+Wed Sep  9 01:07:30 1998  Jakub Jelinek  <jj@sunsite.ms.mff.cuni.cz>
+
+	* config/sparc/sparc.h (TARGET_CM_MEDMID): Fix documentation.
+	(CASE_VECTOR_MODE): Set to SImode even if PTR64, when MEDLOW and
+	not doing pic.
+	(ASM_OUTPUT_ADDR_{VEC,DIFF}_ELT): Check CASE_VECTOR_MODE not
+	Pmode.
+	* config/sparc/sparc.md (tablejump): Likewise, and sign extend op0
+	to Pmode if CASE_VECTOR_MODE is something else.
+
 Wed Sep  9 00:10:31 1998  Jeffrey A Law  (law@cygnus.com)
 
 	* prefix.c (update_path): Correctly handle cases where PATH is

gcc/config/sparc/sparc.h

@@ -55,7 +55,8 @@ Boston, MA 02111-1307, USA.  */
    TARGET_CM_MEDMID: 64 bit address space.
                      The executable must be in the low 16 TB of memory.
                      This corresponds to the low 44 bits, and the %[hml]44
-                     relocs are used.
+                     relocs are used.  The text segment has a maximum size
+                     of 31 bits.
 
    TARGET_CM_MEDANY: 64 bit address space.
                      The text and data segments have a maximum size of 31
@@ -2469,7 +2470,10 @@ extern struct rtx_def *legitimize_pic_address ();
 
 /* Specify the machine mode that this machine uses
    for the index in the tablejump instruction.  */
-#define CASE_VECTOR_MODE Pmode
+/* If we ever implement any of the full models (such as CM_FULLANY),
+   this has to be DImode in that case */
+#define CASE_VECTOR_MODE \
+(! TARGET_PTR64 ? SImode : flag_pic ? SImode : TARGET_CM_MEDLOW ? SImode : DImode)
 
 /* Define as C expression which evaluates to nonzero if the tablejump
    instruction expects the table to contain offsets from the address of the
@@ -2967,7 +2971,7 @@ extern int ultrasparc_variable_issue ();
 do {									\
   char label[30];							\
   ASM_GENERATE_INTERNAL_LABEL (label, "L", VALUE);			\
-  if (Pmode == SImode)							\
+  if (CASE_VECTOR_MODE == SImode)					\
     fprintf (FILE, "\t.word\t");					\
   else									\
     fprintf (FILE, "\t.xword\t");					\
@@ -2982,7 +2986,7 @@ do {									\
 do {									\
   char label[30];							\
   ASM_GENERATE_INTERNAL_LABEL (label, "L", (VALUE));			\
-  if (Pmode == SImode)							\
+  if (CASE_VECTOR_MODE == SImode)					\
     fprintf (FILE, "\t.word\t");					\
   else									\
     fprintf (FILE, "\t.xword\t");					\

gcc/config/sparc/sparc.md

@@ -7109,7 +7109,7 @@
   ""
   "
 {
-  if (GET_MODE (operands[0]) != Pmode)
+  if (GET_MODE (operands[0]) != CASE_VECTOR_MODE)
     abort ();
 
   /* In pic mode, our address differences are against the base of the
@@ -7117,9 +7117,12 @@
      the two address loads.  */
   if (flag_pic)
     {
-      rtx tmp;
+      rtx tmp, tmp2;
       tmp = gen_rtx_LABEL_REF (Pmode, operands[1]);
-      tmp = gen_rtx_PLUS (Pmode, operands[0], tmp);
+      tmp2 = operands[0];
+      if (CASE_VECTOR_MODE != Pmode)
+        tmp2 = gen_rtx_SIGN_EXTEND (Pmode, tmp2);
+      tmp = gen_rtx_PLUS (Pmode, tmp2, tmp);
       operands[0] = memory_address (Pmode, tmp);
     }
 }")