Commit 66d617d0 by Uros Bizjak Committed by Uros Bizjak

re PR target/81763 (Issues with BMI on 32bit x86 apps on GCC 7.1+)

	PR target/81763
	* config/i386/i386.md (*andndi3_doubleword): Add earlyclobber
	to (=&r,r,rm) alternative. Add (=r,0,rm) and (=r,r,0) alternatives.

From-SVN: r257096
parent f5ef2a14
2018-01-26 Uros Bizjak <ubizjak@gmail.com>
PR target/81763
* config/i386/i386.md (*andndi3_doubleword): Add earlyclobber
to (=&r,r,rm) alternative. Add (=r,0,rm) and (=r,r,0) alternatives.
2018-01-26 Richard Biener <rguenther@suse.de> 2018-01-26 Richard Biener <rguenther@suse.de>
PR rtl-optimization/84003 PR rtl-optimization/84003
......
...@@ -9250,14 +9250,14 @@ ...@@ -9250,14 +9250,14 @@
}) })
(define_insn "*andndi3_doubleword" (define_insn "*andndi3_doubleword"
[(set (match_operand:DI 0 "register_operand" "=r,&r") [(set (match_operand:DI 0 "register_operand" "=&r,r,r,&r")
(and:DI (and:DI
(not:DI (match_operand:DI 1 "register_operand" "r,0")) (not:DI (match_operand:DI 1 "register_operand" "r,0,r,0"))
(match_operand:DI 2 "nonimmediate_operand" "rm,rm"))) (match_operand:DI 2 "nonimmediate_operand" "rm,rm,0,rm")))
(clobber (reg:CC FLAGS_REG))] (clobber (reg:CC FLAGS_REG))]
"!TARGET_64BIT && TARGET_STV && TARGET_SSE2" "!TARGET_64BIT && TARGET_STV && TARGET_SSE2"
"#" "#"
[(set_attr "isa" "bmi,*")]) [(set_attr "isa" "bmi,bmi,bmi,*")])
(define_split (define_split
[(set (match_operand:DI 0 "register_operand") [(set (match_operand:DI 0 "register_operand")
......
Markdown is supported
0% or
You are about to add 0 people to the discussion. Proceed with caution.
Finish editing this message first!
Please register or to comment