Disallow 'B' constraints on amdgcn addc/subb

2020-01-07  Andrew Stubbs  <ams@codesourcery.com>

	gcc/
	* config/gcn/constraints.md (DA): Update description and match.
	(DB): Likewise.
	(Db): New constraint.
	* config/gcn/gcn-protos.h (gcn_inline_constant64_p): Add second
	parameter.
	* config/gcn/gcn.c (gcn_inline_constant64_p): Add 'mixed' parameter.
	Implement 'Db' mixed immediate type.
	* config/gcn/gcn-valu.md (addcv64si3<exec_vcc>): Rework constraints.
	(addcv64si3_dup<exec_vcc>): Delete.
	(subcv64si3<exec_vcc>): Rework constraints.
	(addv64di3): Rework constraints.
	(addv64di3_exec): Rework constraints.
	(subv64di3): Rework constraints.
	(addv64di3_dup): Delete.
	(addv64di3_dup_exec): Delete.
	(addv64di3_zext): Rework constraints.
	(addv64di3_zext_exec): Rework constraints.
	(addv64di3_zext_dup): Rework constraints.
	(addv64di3_zext_dup_exec): Rework constraints.
	(addv64di3_zext_dup2): Rework constraints.
	(addv64di3_zext_dup2_exec): Rework constraints.
	(addv64di3_sext_dup2): Rework constraints.
	(addv64di3_sext_dup2_exec): Rework constraints.

From-SVN: r279959

gcc/ChangeLog

+2020-01-07  Andrew Stubbs  <ams@codesourcery.com>
+
+	* config/gcn/constraints.md (DA): Update description and match.
+	(DB): Likewise.
+	(Db): New constraint.
+	* config/gcn/gcn-protos.h (gcn_inline_constant64_p): Add second
+	parameter.
+	* config/gcn/gcn.c (gcn_inline_constant64_p): Add 'mixed' parameter.
+	Implement 'Db' mixed immediate type.
+	* config/gcn/gcn-valu.md (addcv64si3<exec_vcc>): Rework constraints.
+	(addcv64si3_dup<exec_vcc>): Delete.
+	(subcv64si3<exec_vcc>): Rework constraints.
+	(addv64di3): Rework constraints.
+	(addv64di3_exec): Rework constraints.
+	(subv64di3): Rework constraints.
+	(addv64di3_dup): Delete.
+	(addv64di3_dup_exec): Delete.
+	(addv64di3_zext): Rework constraints.
+	(addv64di3_zext_exec): Rework constraints.
+	(addv64di3_zext_dup): Rework constraints.
+	(addv64di3_zext_dup_exec): Rework constraints.
+	(addv64di3_zext_dup2): Rework constraints.
+	(addv64di3_zext_dup2_exec): Rework constraints.
+	(addv64di3_sext_dup2): Rework constraints.
+	(addv64di3_sext_dup2_exec): Rework constraints.
+
 2020-01-07  Andre Vieira  <andre.simoesdiasvieira@arm.com>
 
 	* doc/sourcebuild.texi (arm_little_endian, arm_nothumb): Documented

gcc/config/gcn/constraints.md

@@ -53,12 +53,17 @@
 	(match_test "gcn_constant64_p (op)")))
 
 (define_constraint "DA"
-  "Splittable inline immediate 64-bit parameter"
+  "Immediate 64-bit parameter, low and high part match 'A'"
   (and (match_code "const_int,const_double,const_vector")
-       (match_test "gcn_inline_constant64_p (op)")))
+       (match_test "gcn_inline_constant64_p (op, 0)")))
+
+(define_constraint "Db"
+  "Immediate 64-bit parameter, low part matches 'B', high part matches 'A'"
+  (and (match_code "const_int,const_double,const_vector")
+       (match_test "gcn_inline_constant64_p (op, 1)")))
 
 (define_constraint "DB"
-  "Splittable immediate 64-bit parameter"
+  "Immediate 64-bit parameter, low and high part match 'B'"
   (match_code "const_int,const_double,const_vector"))
 
 (define_constraint "U"

gcc/config/gcn/gcn-protos.h

@@ -51,7 +51,7 @@ extern int gcn_hard_regno_nregs (int regno, machine_mode mode);
 extern void gcn_hsa_declare_function_name (FILE *file, const char *name,
 					   tree decl);
 extern HOST_WIDE_INT gcn_initial_elimination_offset (int, int);
-extern bool gcn_inline_constant64_p (rtx);
+extern bool gcn_inline_constant64_p (rtx, bool);
 extern bool gcn_inline_constant_p (rtx);
 extern int gcn_inline_fp_constant_p (rtx, bool);
 extern reg_class gcn_mode_code_base_reg_class (machine_mode, addr_space_t,

gcc/config/gcn/gcn.c

@@ -902,16 +902,17 @@ gcn_constant_p (rtx x)
 
 /* Return true if X is a constant representable as two inline immediate
    constants in a 64-bit instruction that is split into two 32-bit
-   instructions.  */
+   instructions.
+   When MIXED is set, the low-part is permitted to use the full 32-bits.  */
 
 bool
-gcn_inline_constant64_p (rtx x)
+gcn_inline_constant64_p (rtx x, bool mixed)
 {
   if (GET_CODE (x) == CONST_VECTOR)
     {
       if (!vgpr_vector_mode_p (GET_MODE (x)))
 	return false;
-      if (!gcn_inline_constant64_p (CONST_VECTOR_ELT (x, 0)))
+      if (!gcn_inline_constant64_p (CONST_VECTOR_ELT (x, 0), mixed))
 	return false;
       for (int i = 1; i < 64; i++)
 	if (CONST_VECTOR_ELT (x, i) != CONST_VECTOR_ELT (x, 0))
@@ -925,7 +926,8 @@ gcn_inline_constant64_p (rtx x)
 
   rtx val_lo = gcn_operand_part (DImode, x, 0);
   rtx val_hi = gcn_operand_part (DImode, x, 1);
-  return gcn_inline_constant_p (val_lo) && gcn_inline_constant_p (val_hi);
+  return ((mixed || gcn_inline_constant_p (val_lo))
+	  && gcn_inline_constant_p (val_hi));
 }
 
 /* Return true if X is a constant representable as an immediate constant