Commit 6673b2ea by Jeffrey A Law Committed by Jeff Law

mn10300.c (count_tst_insns): New arg oreg_countp.

        * mn10300.c (count_tst_insns): New arg oreg_countp.  Callers changed.
        Simplify tests for clearing an address register.
        (expand_prologue): Corresponding changes.

From-SVN: r21215
parent fed2012b
Thu Jul 16 14:48:47 1998 Jeffrey A Law (law@cygnus.com) Thu Jul 16 14:48:47 1998 Jeffrey A Law (law@cygnus.com)
* mn10300.c (count_tst_insns): New arg oreg_countp. Callers changed.
Simplify tests for clearing an address register.
(expand_prologue): Corresponding changes.
* mn10300.md (movXX patterns): Make sure the destination is an * mn10300.md (movXX patterns): Make sure the destination is an
ADDRESS_REG when substituting "zero_areg" for (const_int 0). ADDRESS_REG when substituting "zero_areg" for (const_int 0).
(logical patterns): Split into expanders + patterns (logical patterns): Split into expanders + patterns
......
...@@ -382,15 +382,17 @@ can_use_return_insn () ...@@ -382,15 +382,17 @@ can_use_return_insn ()
/* Count the number of tst insns which compare a data or address /* Count the number of tst insns which compare a data or address
register with zero. */ register with zero. */
static void static void
count_tst_insns (dreg_countp, areg_countp) count_tst_insns (dreg_countp, areg_countp, oreg_countp)
int *dreg_countp; int *dreg_countp;
int *areg_countp; int *areg_countp;
int *oreg_countp;
{ {
rtx insn; rtx insn;
/* Assume no tst insns exist. */ /* Assume no tst insns exist. */
*dreg_countp = 0; *dreg_countp = 0;
*areg_countp = 0; *areg_countp = 0;
*oreg_countp = 0;
/* If not optimizing, then quit now. */ /* If not optimizing, then quit now. */
if (!optimize) if (!optimize)
...@@ -424,8 +426,7 @@ count_tst_insns (dreg_countp, areg_countp) ...@@ -424,8 +426,7 @@ count_tst_insns (dreg_countp, areg_countp)
/* Setting an address register to zero can also be optimized, /* Setting an address register to zero can also be optimized,
so count it just like a tst insn. */ so count it just like a tst insn. */
if (GET_CODE (SET_DEST (pat)) == REG if (GET_CODE (SET_DEST (pat)) == REG
&& GET_CODE (SET_SRC (pat)) == CONST_INT && SET_SRC (pat) == CONST0_RTX (GET_MODE (SET_DEST (pat)))
&& INTVAL (SET_SRC (pat)) == 0
&& REGNO_REG_CLASS (REGNO (SET_DEST (pat))) == ADDRESS_REGS) && REGNO_REG_CLASS (REGNO (SET_DEST (pat))) == ADDRESS_REGS)
(*areg_countp)++; (*areg_countp)++;
} }
...@@ -447,16 +448,16 @@ expand_prologue () ...@@ -447,16 +448,16 @@ expand_prologue ()
|| regs_ever_live[6] || regs_ever_live[7] || regs_ever_live[6] || regs_ever_live[7]
|| frame_pointer_needed) || frame_pointer_needed)
{ {
int dreg_count, areg_count; int dreg_count, areg_count, oreg_count;
/* Get a count of the number of tst insns which use address and /* Get a count of the number of tst insns which use address and
data registers. */ data registers. */
count_tst_insns (&dreg_count, &areg_count); count_tst_insns (&dreg_count, &areg_count, &oreg_count);
/* If there's more than one tst insn using a data register, then /* If there's more than one tst insn using a data register, then
this optimization is a win. */ this optimization is a win. */
if (dreg_count > 1 if ((dreg_count > 1 || oreg_count > 1)
&& (!regs_ever_live[2] || !regs_ever_live[3])) && (!regs_ever_live[2] || !regs_ever_live[3]))
{ {
if (!regs_ever_live[2]) if (!regs_ever_live[2])
{ {
...@@ -474,8 +475,8 @@ expand_prologue () ...@@ -474,8 +475,8 @@ expand_prologue ()
/* If there's more than two tst insns using an address register, /* If there's more than two tst insns using an address register,
then this optimization is a win. */ then this optimization is a win. */
if (areg_count > 2 if ((areg_count > 2 || oreg_count > 1)
&& (!regs_ever_live[6] || !regs_ever_live[7])) && (!regs_ever_live[6] || !regs_ever_live[7]))
{ {
if (!regs_ever_live[6]) if (!regs_ever_live[6])
{ {
......
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