Fix movdi_internal to return MODE_TI with AVX512

gcc/
	* config/i386/i386.md: Fix AVX512 register width in AVX512 instruction.

From-SVN: r255293

gcc/ChangeLog

 2017-12-01  Sergey Shalnov  <Sergey.Shalnov@intel.com>
 
+	* config/i386/i386.md: Fix AVX512 register width in AVX512 instruction.
+
+2017-12-01  Sergey Shalnov  <Sergey.Shalnov@intel.com>
+
 	* config/i386/i386.c (standard_sse_constant_opcode): Fix wrong form for
 	vpcmpeqd instruction.
 

gcc/config/i386/i386.md

@@ -2254,10 +2254,13 @@
 	      && (GENERAL_REG_P (operands[0]) || GENERAL_REG_P (operands[1])))
 	    return "%vmovd\t{%1, %0|%0, %1}";
 	  return "%vmovq\t{%1, %0|%0, %1}";
+
 	case MODE_TI:
+	  /* Handle AVX512 registers set.  */
+	  if (EXT_REX_SSE_REG_P (operands[0])
+	      || EXT_REX_SSE_REG_P (operands[1]))
+	    return "vmovdqa64\t{%1, %0|%0, %1}";
 	  return "%vmovdqa\t{%1, %0|%0, %1}";
-	case MODE_XI:
-	  return "vmovdqa64\t{%g1, %g0|%g0, %g1}";
 
 	case MODE_V2SF:
 	  gcc_assert (!TARGET_AVX);
@@ -2349,7 +2352,7 @@
 	    (eq_attr "alternative" "12,13")
 	      (cond [(ior (match_operand 0 "ext_sse_reg_operand")
 			  (match_operand 1 "ext_sse_reg_operand"))
-		       (const_string "XI")
+		       (const_string "TI")
 		     (ior (not (match_test "TARGET_SSE2"))
 			  (match_test "TARGET_SSE_PACKED_SINGLE_INSN_OPTIMAL"))
 		       (const_string "V4SF")