Commit 6514899f by H.J. Lu Committed by H.J. Lu

i386: Insert ENDBR to trampoline for -fcf-protection=branch -mibt

When -fcf-protection=branch -mibt are used, we need to insert ENDBR
to trampoline.  TRAMPOLINE_SIZE is creased by 4 bytes to accommodate
4-byte ENDBR instruction.

gcc/

	PR target/85044
	* config/i386/i386.c (ix86_trampoline_init): Insert ENDBR for
	-fcf-protection=branch -mibt.
	* config/i386/i386.h (TRAMPOLINE_SIZE): Increased by 4 bytes.

gcc/testsuite/

	PR target/85044
	* gcc.target/i386/pr85044.c: New test.

From-SVN: r258897
parent ae0c28bb
2018-03-27 H.J. Lu <hongjiu.lu@intel.com>
PR target/85044
* config/i386/i386.c (ix86_trampoline_init): Insert ENDBR for
-fcf-protection=branch -mibt.
* config/i386/i386.h (TRAMPOLINE_SIZE): Increased by 4 bytes.
2018-03-27 Ramana Radhakrishnan <ramana.radhakrishnan@arm.com> 2018-03-27 Ramana Radhakrishnan <ramana.radhakrishnan@arm.com>
PR target/81863 PR target/81863
......
...@@ -30411,6 +30411,7 @@ ix86_trampoline_init (rtx m_tramp, tree fndecl, rtx chain_value) ...@@ -30411,6 +30411,7 @@ ix86_trampoline_init (rtx m_tramp, tree fndecl, rtx chain_value)
rtx mem, fnaddr; rtx mem, fnaddr;
int opcode; int opcode;
int offset = 0; int offset = 0;
bool need_endbr = (flag_cf_protection & CF_BRANCH) && TARGET_IBT;
fnaddr = XEXP (DECL_RTL (fndecl), 0); fnaddr = XEXP (DECL_RTL (fndecl), 0);
...@@ -30418,6 +30419,14 @@ ix86_trampoline_init (rtx m_tramp, tree fndecl, rtx chain_value) ...@@ -30418,6 +30419,14 @@ ix86_trampoline_init (rtx m_tramp, tree fndecl, rtx chain_value)
{ {
int size; int size;
if (need_endbr)
{
/* Insert ENDBR64. */
mem = adjust_address (m_tramp, SImode, offset);
emit_move_insn (mem, gen_int_mode (0xfa1e0ff3, SImode));
offset += 4;
}
/* Load the function address to r11. Try to load address using /* Load the function address to r11. Try to load address using
the shorter movl instead of movabs. We may want to support the shorter movl instead of movabs. We may want to support
movq for kernel mode, but kernel does not use trampolines at movq for kernel mode, but kernel does not use trampolines at
...@@ -30495,6 +30504,14 @@ ix86_trampoline_init (rtx m_tramp, tree fndecl, rtx chain_value) ...@@ -30495,6 +30504,14 @@ ix86_trampoline_init (rtx m_tramp, tree fndecl, rtx chain_value)
else else
opcode = 0x68; opcode = 0x68;
if (need_endbr)
{
/* Insert ENDBR32. */
mem = adjust_address (m_tramp, SImode, offset);
emit_move_insn (mem, gen_int_mode (0xfb1e0ff3, SImode));
offset += 4;
}
mem = adjust_address (m_tramp, QImode, offset); mem = adjust_address (m_tramp, QImode, offset);
emit_move_insn (mem, gen_int_mode (opcode, QImode)); emit_move_insn (mem, gen_int_mode (opcode, QImode));
...@@ -1716,7 +1716,7 @@ typedef struct ix86_args { ...@@ -1716,7 +1716,7 @@ typedef struct ix86_args {
/* Length in units of the trampoline for entering a nested function. */ /* Length in units of the trampoline for entering a nested function. */
#define TRAMPOLINE_SIZE (TARGET_64BIT ? 24 : 10) #define TRAMPOLINE_SIZE (TARGET_64BIT ? 28 : 14)
/* Definitions for register eliminations. /* Definitions for register eliminations.
......
2018-03-27 H.J. Lu <hongjiu.lu@intel.com>
PR target/85044
* gcc.target/i386/pr85044.c: New test.
2018-03-27 Martin Sebor <msebor@redhat.com> 2018-03-27 Martin Sebor <msebor@redhat.com>
PR testsuite/83462 PR testsuite/83462
......
/* { dg-do run { target cet } } */
/* { dg-options "-O2 -fcf-protection=branch -mibt" } */
void callme (void (*callback) (void));
int
main (void)
{
int ok = 0;
void callback (void) { ok = 1; }
callme (&callback);
if (!ok)
__builtin_abort ();
return 0;
}
__attribute__((noinline, noclone))
void
callme (void (*callback) (void))
{
(*callback) ();
}
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