Commit 64ef8953 by Uros Bizjak

i386.md ("*sse_prologue_save_insn"): Use braced output control string instead of quoted.

        * config/i386/i386.md ("*sse_prologue_save_insn"): Use braced output
        control string instead of quoted.

From-SVN: r133984
parent 84159bd8
2008-04-07 Uros Bizjak <ubizjak@gmail.com>
* config/i386/i386.md ("*sse_prologue_save_insn"): Use braced output
control string instead of quoted.
2008-04-07 Kenneth Zadeck <zadeck@naturalbridge.com> 2008-04-07 Kenneth Zadeck <zadeck@naturalbridge.com>
doc/rtl.texi: Rewrite of subreg section. * doc/rtl.texi: Rewrite of subreg section.
2008-04-07 Kai Tietz <kai.tietz@onevision.com> 2008-04-07 Kai Tietz <kai.tietz@onevision.com>
PR/35842 PR/35842
* config/i386/i386.c (legitimize_pic_address): Add treating * config/i386/i386.c (legitimize_pic_address): Add treating
of dllimport SYM_REF's. of dllimport SYM_REF's.
(legitimize_dllimport_symbol): Add prototype. (legitimize_dllimport_symbol): Add prototype.
2008-04-07 Eric Botcazou <ebotcazou@adacore.com> 2008-04-07 Eric Botcazou <ebotcazou@adacore.com>
...@@ -278,12 +283,10 @@ ...@@ -278,12 +283,10 @@
* config/mips/mips.md (any_gt, any_ge, any_lt, any_le): New code * config/mips/mips.md (any_gt, any_ge, any_lt, any_le): New code
iterators. iterators.
(u): Add attribute values for gt, gtu, ge, geu, lt, ltu, le and (u): Add attribute values for gt, gtu, ge, geu, lt, ltu, le and leu.
leu.
(sgt<u>): Merge sgt and sgtu into new expander. (sgt<u>): Merge sgt and sgtu into new expander.
(sgt, sgtu): Remove expanders. (sgt, sgtu): Remove expanders.
(*sgt<u>_<mode>): Merge *sgt_<mode> and *sgtu_<mode> into new (*sgt<u>_<mode>): Merge *sgt_<mode> and *sgtu_<mode> into new pattern.
pattern.
(*sgt_<mode>, *sgtu_<mode>): Remove patterns. (*sgt_<mode>, *sgtu_<mode>): Remove patterns.
(*sgt<u>_<mode>_mips16): Merge *sgt_<mode>_mips16 and (*sgt<u>_<mode>_mips16): Merge *sgt_<mode>_mips16 and
*sgtu_<mode>_mips16 into new pattern. *sgtu_<mode>_mips16 into new pattern.
...@@ -295,16 +298,14 @@ ...@@ -295,16 +298,14 @@
(*sge_<mode>, second *sge_<mode>): Remove patterns. (*sge_<mode>, second *sge_<mode>): Remove patterns.
(slt<u>): Merge slt and sltu into new expander. (slt<u>): Merge slt and sltu into new expander.
(slt, sltu): Remove expanders. (slt, sltu): Remove expanders.
(*slt<u>_<mode>): Merge *slt_<mode> and *sltu_<mode> into new (*slt<u>_<mode>): Merge *slt_<mode> and *sltu_<mode> into new pattern.
pattern.
(*slt_<mode>, *sltu_<mode>): Remove patterns. (*slt_<mode>, *sltu_<mode>): Remove patterns.
(*slt<u>_<mode>_mips16): Merge *slt_<mode>_mips16 and (*slt<u>_<mode>_mips16): Merge *slt_<mode>_mips16 and
*sltu_<mode>_mips16 into new pattern. *sltu_<mode>_mips16 into new pattern.
(*slt_<mode>_mips16, *sltu_<mode>_mips16): Remove patterns. (*slt_<mode>_mips16, *sltu_<mode>_mips16): Remove patterns.
(sle<u>): Merge sle and sleu into new expander. (sle<u>): Merge sle and sleu into new expander.
(sle, sleu): Remove expanders. (sle, sleu): Remove expanders.
(*sle<u>_<mode>): Merge *sle_<mode> and *sleu_<mode> into new (*sle<u>_<mode>): Merge *sle_<mode> and *sleu_<mode> into new pattern.
pattern.
(*sle_<mode>, *sleu_<mode>): Remove patterns. (*sle_<mode>, *sleu_<mode>): Remove patterns.
(*sle<u>_<mode>_mips16): Merge *sle_<mode>_mips16 and (*sle<u>_<mode>_mips16): Merge *sle_<mode>_mips16 and
*sleu_<mode>_mips16 into new pattern. *sleu_<mode>_mips16 into new pattern.
......
...@@ -21067,26 +21067,24 @@ ...@@ -21067,26 +21067,24 @@
"TARGET_64BIT "TARGET_64BIT
&& INTVAL (operands[4]) + SSE_REGPARM_MAX * 16 - 16 < 128 && INTVAL (operands[4]) + SSE_REGPARM_MAX * 16 - 16 < 128
&& INTVAL (operands[4]) + INTVAL (operands[2]) * 16 >= -128" && INTVAL (operands[4]) + INTVAL (operands[2]) * 16 >= -128"
"*
{ {
int i; int i;
operands[0] = gen_rtx_MEM (Pmode, operands[0] = gen_rtx_MEM (Pmode,
gen_rtx_PLUS (Pmode, operands[0], operands[4])); gen_rtx_PLUS (Pmode, operands[0], operands[4]));
output_asm_insn (\"jmp\\t%A1\", operands); output_asm_insn ("jmp\t%A1", operands);
for (i = SSE_REGPARM_MAX - 1; i >= INTVAL (operands[2]); i--) for (i = SSE_REGPARM_MAX - 1; i >= INTVAL (operands[2]); i--)
{ {
operands[4] = adjust_address (operands[0], DImode, i*16); operands[4] = adjust_address (operands[0], DImode, i*16);
operands[5] = gen_rtx_REG (TImode, SSE_REGNO (i)); operands[5] = gen_rtx_REG (TImode, SSE_REGNO (i));
PUT_MODE (operands[4], TImode); PUT_MODE (operands[4], TImode);
if (GET_CODE (XEXP (operands[0], 0)) != PLUS) if (GET_CODE (XEXP (operands[0], 0)) != PLUS)
output_asm_insn (\"rex\", operands); output_asm_insn ("rex", operands);
output_asm_insn (\"movaps\\t{%5, %4|%4, %5}\", operands); output_asm_insn ("movaps\t{%5, %4|%4, %5}", operands);
} }
(*targetm.asm_out.internal_label) (asm_out_file, \"L\", (*targetm.asm_out.internal_label) (asm_out_file, "L",
CODE_LABEL_NUMBER (operands[3])); CODE_LABEL_NUMBER (operands[3]));
return \"\"; return "";
} }
"
[(set_attr "type" "other") [(set_attr "type" "other")
(set_attr "length_immediate" "0") (set_attr "length_immediate" "0")
(set_attr "length_address" "0") (set_attr "length_address" "0")
......
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