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riscv-gcc-1
Commit 640667cb by Michael Meissner
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Prefer float registers for movdf. 

From-SVN: r8192
parent a784882b
Showing with 3 additions and 3 deletions
gcc/config/i386/i386.md
...@@ -1084,7 +1084,7 @@ ...@@ -1084,7 +1084,7 @@
} }
}") }")
(define_insn "movsf_push386" (define_insn "movsf_push_nomove"
[(set (match_operand:SF 0 "push_operand" "=<,<") [(set (match_operand:SF 0 "push_operand" "=<,<")
(match_operand:SF 1 "general_operand" "gF,f"))] (match_operand:SF 1 "general_operand" "gF,f"))]
"!TARGET_MOVE" "!TARGET_MOVE"
...@@ -1323,8 +1323,8 @@ ...@@ -1323,8 +1323,8 @@
;; For the purposes of regclass, prefer FLOAT_REGS. ;; For the purposes of regclass, prefer FLOAT_REGS.
(define_insn "movdf_normal" (define_insn "movdf_normal"
[(set (match_operand:DF 0 "general_operand" "=*rfm,*rf,f,!*rm") [(set (match_operand:DF 0 "general_operand" "=f,fm,!*rf,!*rm")
(match_operand:DF 1 "general_operand" "*rf,*rfm,fG,fF"))] (match_operand:DF 1 "general_operand" "fmG,f,*rfm,*rfF"))]
"(!TARGET_MOVE || GET_CODE (operands[0]) != MEM) || (GET_CODE (operands[1]) != MEM)" "(!TARGET_MOVE || GET_CODE (operands[0]) != MEM) || (GET_CODE (operands[1]) != MEM)"
"* "*
{ {
......
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