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Commit 6308e208 by Richard Sandiford Committed by Richard Sandiford
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arm.c (arm_print_operand): Use MEM_SIZE to get the size of a '%A' memory reference. 

gcc/
	* config/arm/arm.c (arm_print_operand): Use MEM_SIZE to get the
	size of a '%A' memory reference.
	(T_DREG, T_QREG): New neon_builtin_type_bits.
	(arm_init_neon_builtins): Assert that the load and store operands
	are neon_struct_operands.
	(locate_neon_builtin_icode): Provide the neon_builtin_type_bits.
	(NEON_ARG_MEMORY): New builtin_arg.
	(neon_dereference_pointer): New function.
	(arm_expand_neon_args): Add a neon_builtin_type_bits argument.
	Handle NEON_ARG_MEMORY.
	(arm_expand_neon_builtin): Update after above interface changes.
	Use NEON_ARG_MEMORY for loads and stores.
	* config/arm/predicates.md (neon_struct_operand): New predicate.
	* config/arm/iterators.md (V_two_elem): Tweak formatting.
	(V_three_elem): Use BLKmode for accesses that have no associated mode.
	(V_four_elem): Tweak formatting.
	* config/arm/neon.md (neon_vld1<mode>, neon_vld1_dup<mode>)
	(neon_vst1_lane<mode>, neon_vst1<mode>, neon_vld2<mode>)
	(neon_vld2_lane<mode>, neon_vld2_dup<mode>, neon_vst2<mode>)
	(neon_vst2_lane<mode>, neon_vld3<mode>, neon_vld3_lane<mode>)
	(neon_vld3_dup<mode>, neon_vst3<mode>, neon_vst3_lane<mode>)
	(neon_vld4<mode>, neon_vld4_lane<mode>, neon_vld4_dup<mode>)
	(neon_vst4<mode>): Replace pointer operand with a memory operand.
	Use %A in the output template.
	(neon_vld3qa<mode>, neon_vld3qb<mode>, neon_vst3qa<mode>)
	(neon_vst3qb<mode>, neon_vld4qa<mode>, neon_vld4qb<mode>)
	(neon_vst4qa<mode>, neon_vst4qb<mode>): Likewise, but halve
	the width of the memory access.  Remove post-increment.
	* config/arm/neon-testgen.ml: Allow addresses to have an alignment.

gcc/testsuite/
	* gcc.target/arm/neon-vld3-1.c: New test.
	* gcc.target/arm/neon-vst3-1.c: New test.
	* gcc.target/arm/neon/v*.c: Regenerate.

From-SVN: r172314
parent e5db8f2f
Showing with 203 additions and 111 deletions
gcc/ChangeLog
2011-04-12 Richard Sandiford <richard.sandiford@linaro.org>
* config/arm/arm.c (arm_print_operand): Use MEM_SIZE to get the
size of a '%A' memory reference.
(T_DREG, T_QREG): New neon_builtin_type_bits.
(arm_init_neon_builtins): Assert that the load and store operands
are neon_struct_operands.
(locate_neon_builtin_icode): Provide the neon_builtin_type_bits.
(NEON_ARG_MEMORY): New builtin_arg.
(neon_dereference_pointer): New function.
(arm_expand_neon_args): Add a neon_builtin_type_bits argument.
Handle NEON_ARG_MEMORY.
(arm_expand_neon_builtin): Update after above interface changes.
Use NEON_ARG_MEMORY for loads and stores.
* config/arm/predicates.md (neon_struct_operand): New predicate.
* config/arm/iterators.md (V_two_elem): Tweak formatting.
(V_three_elem): Use BLKmode for accesses that have no associated mode.
(V_four_elem): Tweak formatting.
* config/arm/neon.md (neon_vld1<mode>, neon_vld1_dup<mode>)
(neon_vst1_lane<mode>, neon_vst1<mode>, neon_vld2<mode>)
(neon_vld2_lane<mode>, neon_vld2_dup<mode>, neon_vst2<mode>)
(neon_vst2_lane<mode>, neon_vld3<mode>, neon_vld3_lane<mode>)
(neon_vld3_dup<mode>, neon_vst3<mode>, neon_vst3_lane<mode>)
(neon_vld4<mode>, neon_vld4_lane<mode>, neon_vld4_dup<mode>)
(neon_vst4<mode>): Replace pointer operand with a memory operand.
Use %A in the output template.
(neon_vld3qa<mode>, neon_vld3qb<mode>, neon_vst3qa<mode>)
(neon_vst3qb<mode>, neon_vld4qa<mode>, neon_vld4qb<mode>)
(neon_vst4qa<mode>, neon_vst4qb<mode>): Likewise, but halve
the width of the memory access. Remove post-increment.
* config/arm/neon-testgen.ml: Allow addresses to have an alignment.
2011-04-12 Nick Clifton <nickc@redhat.com> 2011-04-12 Nick Clifton <nickc@redhat.com>
* config/v850/v850.c (expand_prologue): Do not use the CALLT * config/v850/v850.c (expand_prologue): Do not use the CALLT
......
gcc/config/arm/iterators.md
...@@ -194,24 +194,22 @@ ...@@ -194,24 +194,22 @@
;; Mode of pair of elements for each vector mode, to define transfer ;; Mode of pair of elements for each vector mode, to define transfer
;; size for structure lane/dup loads and stores. ;; size for structure lane/dup loads and stores.
(define_mode_attr V_two_elem [(V8QI "HI") (V16QI "HI") (define_mode_attr V_two_elem [(V8QI "HI") (V16QI "HI")
(V4HI "SI") (V8HI "SI") (V4HI "SI") (V8HI "SI")
(V2SI "V2SI") (V4SI "V2SI") (V2SI "V2SI") (V4SI "V2SI")
(V2SF "V2SF") (V4SF "V2SF") (V2SF "V2SF") (V4SF "V2SF")
(DI "V2DI") (V2DI "V2DI")]) (DI "V2DI") (V2DI "V2DI")])
;; Similar, for three elements. ;; Similar, for three elements.
;; ??? Should we define extra modes so that sizes of all three-element (define_mode_attr V_three_elem [(V8QI "BLK") (V16QI "BLK")
;; accesses can be accurately represented? (V4HI "BLK") (V8HI "BLK")
(define_mode_attr V_three_elem [(V8QI "SI") (V16QI "SI") (V2SI "BLK") (V4SI "BLK")
(V4HI "V4HI") (V8HI "V4HI") (V2SF "BLK") (V4SF "BLK")
(V2SI "V4SI") (V4SI "V4SI") (DI "EI") (V2DI "EI")])
(V2SF "V4SF") (V4SF "V4SF")
(DI "EI") (V2DI "EI")])
;; Similar, for four elements. ;; Similar, for four elements.
(define_mode_attr V_four_elem [(V8QI "SI") (V16QI "SI") (define_mode_attr V_four_elem [(V8QI "SI") (V16QI "SI")
(V4HI "V4HI") (V8HI "V4HI") (V4HI "V4HI") (V8HI "V4HI")
(V2SI "V4SI") (V4SI "V4SI") (V2SI "V4SI") (V4SI "V4SI")
(V2SF "V4SF") (V4SF "V4SF") (V2SF "V4SF") (V4SF "V4SF")
(DI "OI") (V2DI "OI")]) (DI "OI") (V2DI "OI")])
......
gcc/config/arm/neon-testgen.ml
...@@ -177,7 +177,7 @@ let rec analyze_shape shape = ...@@ -177,7 +177,7 @@ let rec analyze_shape shape =
let alt2 = commas (fun x -> x) (n_things n elt_regexp) "" in let alt2 = commas (fun x -> x) (n_things n elt_regexp) "" in
"\\\\\\{((" ^ alt1 ^ ")|(" ^ alt2 ^ "))\\\\\\}" "\\\\\\{((" ^ alt1 ^ ")|(" ^ alt2 ^ "))\\\\\\}"
| (PtrTo elt | CstPtrTo elt) -> | (PtrTo elt | CstPtrTo elt) ->
"\\\\\\[" ^ (analyze_shape_elt elt) ^ "\\\\\\]" "\\\\\\[" ^ (analyze_shape_elt elt) ^ "\\(:\\[0-9\\]+\\)?\\\\\\]"
| Element_of_dreg -> (analyze_shape_elt Dreg) ^ "\\\\\\[\\[0-9\\]+\\\\\\]" | Element_of_dreg -> (analyze_shape_elt Dreg) ^ "\\\\\\[\\[0-9\\]+\\\\\\]"
| Element_of_qreg -> (analyze_shape_elt Qreg) ^ "\\\\\\[\\[0-9\\]+\\\\\\]" | Element_of_qreg -> (analyze_shape_elt Qreg) ^ "\\\\\\[\\[0-9\\]+\\\\\\]"
| All_elements_of_dreg -> (analyze_shape_elt Dreg) ^ "\\\\\\[\\\\\\]" | All_elements_of_dreg -> (analyze_shape_elt Dreg) ^ "\\\\\\[\\\\\\]"
......
gcc/config/arm/predicates.md
...@@ -683,3 +683,7 @@ ...@@ -683,3 +683,7 @@
} }
return true; return true;
}) })
(define_special_predicate "neon_struct_operand"
(and (match_code "mem")
(match_test "TARGET_32BIT && neon_vector_mem_operand (op, 2)")))
gcc/testsuite/ChangeLog
2011-04-12 Richard Sandiford <richard.sandiford@linaro.org>
* gcc.target/arm/neon-vld3-1.c: New test.
* gcc.target/arm/neon-vst3-1.c: New test.
* gcc.target/arm/neon/v*.c: Regenerate.
2011-04-12 Jakub Jelinek <jakub@redhat.com> 2011-04-12 Jakub Jelinek <jakub@redhat.com>
PR rtl-optimization/48549 PR rtl-optimization/48549
......
gcc/testsuite/gcc.target/arm/neon-vld3-1.c 0 → 100644
/* { dg-do run } */
/* { dg-require-effective-target arm_neon_hw } */
/* { dg-options "-O2" } */
/* { dg-add-options arm_neon } */
#include "arm_neon.h"
uint32_t buffer[12];
void __attribute__((noinline))
foo (uint32_t *a)
{
uint32x4x3_t x;
x = vld3q_u32 (a);
x.val[0] = vaddq_u32 (x.val[0], x.val[1]);
vst3q_u32 (a, x);
}
int
main (void)
{
buffer[0] = 1;
buffer[1] = 2;
foo (buffer);
return buffer[0] != 3;
}
gcc/testsuite/gcc.target/arm/neon-vst3-1.c 0 → 100644
/* { dg-do run } */
/* { dg-require-effective-target arm_neon_hw } */
/* { dg-options "-O2" } */
/* { dg-add-options arm_neon } */
#include "arm_neon.h"
uint32_t buffer[64];
void __attribute__((noinline))
foo (uint32_t *a)
{
uint32x4x3_t x;
x = vld3q_u32 (a);
a[35] = 1;
vst3q_lane_u32 (a + 32, x, 1);
}
int
main (void)
{
foo (buffer);
return buffer[35] != 1;
}
gcc/testsuite/gcc.target/arm/neon/vld1Q_dupf32.c
...@@ -15,5 +15,5 @@ void test_vld1Q_dupf32 (void) ...@@ -15,5 +15,5 @@ void test_vld1Q_dupf32 (void)
out_float32x4_t = vld1q_dup_f32 (0); out_float32x4_t = vld1q_dup_f32 (0);
} }
/* { dg-final { scan-assembler "vld1\.32\[ \]+\\\{((\[dD\]\[0-9\]+\\\[\\\]-\[dD\]\[0-9\]+\\\[\\\])|(\[dD\]\[0-9\]+\\\[\\\], \[dD\]\[0-9\]+\\\[\\\]))\\\}, \\\[\[rR\]\[0-9\]+\\\]!?\(\[ \]+@\[a-zA-Z0-9 \]+\)?\n" } } */ /* { dg-final { scan-assembler "vld1\.32\[ \]+\\\{((\[dD\]\[0-9\]+\\\[\\\]-\[dD\]\[0-9\]+\\\[\\\])|(\[dD\]\[0-9\]+\\\[\\\], \[dD\]\[0-9\]+\\\[\\\]))\\\}, \\\[\[rR\]\[0-9\]+\(:\[0-9\]+\)?\\\]!?\(\[ \]+@\[a-zA-Z0-9 \]+\)?\n" } } */
/* { dg-final { cleanup-saved-temps } } */ /* { dg-final { cleanup-saved-temps } } */
gcc/testsuite/gcc.target/arm/neon/vld1Q_dupp16.c
...@@ -15,5 +15,5 @@ void test_vld1Q_dupp16 (void) ...@@ -15,5 +15,5 @@ void test_vld1Q_dupp16 (void)
out_poly16x8_t = vld1q_dup_p16 (0); out_poly16x8_t = vld1q_dup_p16 (0);
} }
/* { dg-final { scan-assembler "vld1\.16\[ \]+\\\{((\[dD\]\[0-9\]+\\\[\\\]-\[dD\]\[0-9\]+\\\[\\\])|(\[dD\]\[0-9\]+\\\[\\\], \[dD\]\[0-9\]+\\\[\\\]))\\\}, \\\[\[rR\]\[0-9\]+\\\]!?\(\[ \]+@\[a-zA-Z0-9 \]+\)?\n" } } */ /* { dg-final { scan-assembler "vld1\.16\[ \]+\\\{((\[dD\]\[0-9\]+\\\[\\\]-\[dD\]\[0-9\]+\\\[\\\])|(\[dD\]\[0-9\]+\\\[\\\], \[dD\]\[0-9\]+\\\[\\\]))\\\}, \\\[\[rR\]\[0-9\]+\(:\[0-9\]+\)?\\\]!?\(\[ \]+@\[a-zA-Z0-9 \]+\)?\n" } } */
/* { dg-final { cleanup-saved-temps } } */ /* { dg-final { cleanup-saved-temps } } */
gcc/testsuite/gcc.target/arm/neon/vld1Q_dupp8.c
...@@ -15,5 +15,5 @@ void test_vld1Q_dupp8 (void) ...@@ -15,5 +15,5 @@ void test_vld1Q_dupp8 (void)
out_poly8x16_t = vld1q_dup_p8 (0); out_poly8x16_t = vld1q_dup_p8 (0);
} }
/* { dg-final { scan-assembler "vld1\.8\[ \]+\\\{((\[dD\]\[0-9\]+\\\[\\\]-\[dD\]\[0-9\]+\\\[\\\])|(\[dD\]\[0-9\]+\\\[\\\], \[dD\]\[0-9\]+\\\[\\\]))\\\}, \\\[\[rR\]\[0-9\]+\\\]!?\(\[ \]+@\[a-zA-Z0-9 \]+\)?\n" } } */ /* { dg-final { scan-assembler "vld1\.8\[ \]+\\\{((\[dD\]\[0-9\]+\\\[\\\]-\[dD\]\[0-9\]+\\\[\\\])|(\[dD\]\[0-9\]+\\\[\\\], \[dD\]\[0-9\]+\\\[\\\]))\\\}, \\\[\[rR\]\[0-9\]+\(:\[0-9\]+\)?\\\]!?\(\[ \]+@\[a-zA-Z0-9 \]+\)?\n" } } */
/* { dg-final { cleanup-saved-temps } } */ /* { dg-final { cleanup-saved-temps } } */
gcc/testsuite/gcc.target/arm/neon/vld1Q_dups16.c
...@@ -15,5 +15,5 @@ void test_vld1Q_dups16 (void) ...@@ -15,5 +15,5 @@ void test_vld1Q_dups16 (void)
out_int16x8_t = vld1q_dup_s16 (0); out_int16x8_t = vld1q_dup_s16 (0);
} }
/* { dg-final { scan-assembler "vld1\.16\[ \]+\\\{((\[dD\]\[0-9\]+\\\[\\\]-\[dD\]\[0-9\]+\\\[\\\])|(\[dD\]\[0-9\]+\\\[\\\], \[dD\]\[0-9\]+\\\[\\\]))\\\}, \\\[\[rR\]\[0-9\]+\\\]!?\(\[ \]+@\[a-zA-Z0-9 \]+\)?\n" } } */ /* { dg-final { scan-assembler "vld1\.16\[ \]+\\\{((\[dD\]\[0-9\]+\\\[\\\]-\[dD\]\[0-9\]+\\\[\\\])|(\[dD\]\[0-9\]+\\\[\\\], \[dD\]\[0-9\]+\\\[\\\]))\\\}, \\\[\[rR\]\[0-9\]+\(:\[0-9\]+\)?\\\]!?\(\[ \]+@\[a-zA-Z0-9 \]+\)?\n" } } */
/* { dg-final { cleanup-saved-temps } } */ /* { dg-final { cleanup-saved-temps } } */
gcc/testsuite/gcc.target/arm/neon/vld1Q_dups32.c
...@@ -15,5 +15,5 @@ void test_vld1Q_dups32 (void) ...@@ -15,5 +15,5 @@ void test_vld1Q_dups32 (void)
out_int32x4_t = vld1q_dup_s32 (0); out_int32x4_t = vld1q_dup_s32 (0);
} }
/* { dg-final { scan-assembler "vld1\.32\[ \]+\\\{((\[dD\]\[0-9\]+\\\[\\\]-\[dD\]\[0-9\]+\\\[\\\])|(\[dD\]\[0-9\]+\\\[\\\], \[dD\]\[0-9\]+\\\[\\\]))\\\}, \\\[\[rR\]\[0-9\]+\\\]!?\(\[ \]+@\[a-zA-Z0-9 \]+\)?\n" } } */ /* { dg-final { scan-assembler "vld1\.32\[ \]+\\\{((\[dD\]\[0-9\]+\\\[\\\]-\[dD\]\[0-9\]+\\\[\\\])|(\[dD\]\[0-9\]+\\\[\\\], \[dD\]\[0-9\]+\\\[\\\]))\\\}, \\\[\[rR\]\[0-9\]+\(:\[0-9\]+\)?\\\]!?\(\[ \]+@\[a-zA-Z0-9 \]+\)?\n" } } */
/* { dg-final { cleanup-saved-temps } } */ /* { dg-final { cleanup-saved-temps } } */
gcc/testsuite/gcc.target/arm/neon/vld1Q_dups64.c
...@@ -15,5 +15,5 @@ void test_vld1Q_dups64 (void) ...@@ -15,5 +15,5 @@ void test_vld1Q_dups64 (void)
out_int64x2_t = vld1q_dup_s64 (0); out_int64x2_t = vld1q_dup_s64 (0);
} }
/* { dg-final { scan-assembler "vld1\.64\[ \]+\\\{((\[dD\]\[0-9\]+-\[dD\]\[0-9\]+)|(\[dD\]\[0-9\]+, \[dD\]\[0-9\]+))\\\}, \\\[\[rR\]\[0-9\]+\\\]!?\(\[ \]+@\[a-zA-Z0-9 \]+\)?\n" } } */ /* { dg-final { scan-assembler "vld1\.64\[ \]+\\\{((\[dD\]\[0-9\]+-\[dD\]\[0-9\]+)|(\[dD\]\[0-9\]+, \[dD\]\[0-9\]+))\\\}, \\\[\[rR\]\[0-9\]+\(:\[0-9\]+\)?\\\]!?\(\[ \]+@\[a-zA-Z0-9 \]+\)?\n" } } */
/* { dg-final { cleanup-saved-temps } } */ /* { dg-final { cleanup-saved-temps } } */
gcc/testsuite/gcc.target/arm/neon/vld1Q_dups8.c
...@@ -15,5 +15,5 @@ void test_vld1Q_dups8 (void) ...@@ -15,5 +15,5 @@ void test_vld1Q_dups8 (void)
out_int8x16_t = vld1q_dup_s8 (0); out_int8x16_t = vld1q_dup_s8 (0);
} }
/* { dg-final { scan-assembler "vld1\.8\[ \]+\\\{((\[dD\]\[0-9\]+\\\[\\\]-\[dD\]\[0-9\]+\\\[\\\])|(\[dD\]\[0-9\]+\\\[\\\], \[dD\]\[0-9\]+\\\[\\\]))\\\}, \\\[\[rR\]\[0-9\]+\\\]!?\(\[ \]+@\[a-zA-Z0-9 \]+\)?\n" } } */ /* { dg-final { scan-assembler "vld1\.8\[ \]+\\\{((\[dD\]\[0-9\]+\\\[\\\]-\[dD\]\[0-9\]+\\\[\\\])|(\[dD\]\[0-9\]+\\\[\\\], \[dD\]\[0-9\]+\\\[\\\]))\\\}, \\\[\[rR\]\[0-9\]+\(:\[0-9\]+\)?\\\]!?\(\[ \]+@\[a-zA-Z0-9 \]+\)?\n" } } */
/* { dg-final { cleanup-saved-temps } } */ /* { dg-final { cleanup-saved-temps } } */
gcc/testsuite/gcc.target/arm/neon/vld1Q_dupu16.c
...@@ -15,5 +15,5 @@ void test_vld1Q_dupu16 (void) ...@@ -15,5 +15,5 @@ void test_vld1Q_dupu16 (void)
out_uint16x8_t = vld1q_dup_u16 (0); out_uint16x8_t = vld1q_dup_u16 (0);
} }
/* { dg-final { scan-assembler "vld1\.16\[ \]+\\\{((\[dD\]\[0-9\]+\\\[\\\]-\[dD\]\[0-9\]+\\\[\\\])|(\[dD\]\[0-9\]+\\\[\\\], \[dD\]\[0-9\]+\\\[\\\]))\\\}, \\\[\[rR\]\[0-9\]+\\\]!?\(\[ \]+@\[a-zA-Z0-9 \]+\)?\n" } } */ /* { dg-final { scan-assembler "vld1\.16\[ \]+\\\{((\[dD\]\[0-9\]+\\\[\\\]-\[dD\]\[0-9\]+\\\[\\\])|(\[dD\]\[0-9\]+\\\[\\\], \[dD\]\[0-9\]+\\\[\\\]))\\\}, \\\[\[rR\]\[0-9\]+\(:\[0-9\]+\)?\\\]!?\(\[ \]+@\[a-zA-Z0-9 \]+\)?\n" } } */
/* { dg-final { cleanup-saved-temps } } */ /* { dg-final { cleanup-saved-temps } } */
gcc/testsuite/gcc.target/arm/neon/vld1Q_dupu32.c
...@@ -15,5 +15,5 @@ void test_vld1Q_dupu32 (void) ...@@ -15,5 +15,5 @@ void test_vld1Q_dupu32 (void)
out_uint32x4_t = vld1q_dup_u32 (0); out_uint32x4_t = vld1q_dup_u32 (0);
} }
/* { dg-final { scan-assembler "vld1\.32\[ \]+\\\{((\[dD\]\[0-9\]+\\\[\\\]-\[dD\]\[0-9\]+\\\[\\\])|(\[dD\]\[0-9\]+\\\[\\\], \[dD\]\[0-9\]+\\\[\\\]))\\\}, \\\[\[rR\]\[0-9\]+\\\]!?\(\[ \]+@\[a-zA-Z0-9 \]+\)?\n" } } */ /* { dg-final { scan-assembler "vld1\.32\[ \]+\\\{((\[dD\]\[0-9\]+\\\[\\\]-\[dD\]\[0-9\]+\\\[\\\])|(\[dD\]\[0-9\]+\\\[\\\], \[dD\]\[0-9\]+\\\[\\\]))\\\}, \\\[\[rR\]\[0-9\]+\(:\[0-9\]+\)?\\\]!?\(\[ \]+@\[a-zA-Z0-9 \]+\)?\n" } } */
/* { dg-final { cleanup-saved-temps } } */ /* { dg-final { cleanup-saved-temps } } */
gcc/testsuite/gcc.target/arm/neon/vld1Q_dupu64.c
...@@ -15,5 +15,5 @@ void test_vld1Q_dupu64 (void) ...@@ -15,5 +15,5 @@ void test_vld1Q_dupu64 (void)
out_uint64x2_t = vld1q_dup_u64 (0); out_uint64x2_t = vld1q_dup_u64 (0);
} }
/* { dg-final { scan-assembler "vld1\.64\[ \]+\\\{((\[dD\]\[0-9\]+-\[dD\]\[0-9\]+)|(\[dD\]\[0-9\]+, \[dD\]\[0-9\]+))\\\}, \\\[\[rR\]\[0-9\]+\\\]!?\(\[ \]+@\[a-zA-Z0-9 \]+\)?\n" } } */ /* { dg-final { scan-assembler "vld1\.64\[ \]+\\\{((\[dD\]\[0-9\]+-\[dD\]\[0-9\]+)|(\[dD\]\[0-9\]+, \[dD\]\[0-9\]+))\\\}, \\\[\[rR\]\[0-9\]+\(:\[0-9\]+\)?\\\]!?\(\[ \]+@\[a-zA-Z0-9 \]+\)?\n" } } */
/* { dg-final { cleanup-saved-temps } } */ /* { dg-final { cleanup-saved-temps } } */
gcc/testsuite/gcc.target/arm/neon/vld1Q_dupu8.c
...@@ -15,5 +15,5 @@ void test_vld1Q_dupu8 (void) ...@@ -15,5 +15,5 @@ void test_vld1Q_dupu8 (void)
out_uint8x16_t = vld1q_dup_u8 (0); out_uint8x16_t = vld1q_dup_u8 (0);
} }
/* { dg-final { scan-assembler "vld1\.8\[ \]+\\\{((\[dD\]\[0-9\]+\\\[\\\]-\[dD\]\[0-9\]+\\\[\\\])|(\[dD\]\[0-9\]+\\\[\\\], \[dD\]\[0-9\]+\\\[\\\]))\\\}, \\\[\[rR\]\[0-9\]+\\\]!?\(\[ \]+@\[a-zA-Z0-9 \]+\)?\n" } } */ /* { dg-final { scan-assembler "vld1\.8\[ \]+\\\{((\[dD\]\[0-9\]+\\\[\\\]-\[dD\]\[0-9\]+\\\[\\\])|(\[dD\]\[0-9\]+\\\[\\\], \[dD\]\[0-9\]+\\\[\\\]))\\\}, \\\[\[rR\]\[0-9\]+\(:\[0-9\]+\)?\\\]!?\(\[ \]+@\[a-zA-Z0-9 \]+\)?\n" } } */
/* { dg-final { cleanup-saved-temps } } */ /* { dg-final { cleanup-saved-temps } } */
gcc/testsuite/gcc.target/arm/neon/vld1Q_lanef32.c
...@@ -16,5 +16,5 @@ void test_vld1Q_lanef32 (void) ...@@ -16,5 +16,5 @@ void test_vld1Q_lanef32 (void)
out_float32x4_t = vld1q_lane_f32 (0, arg1_float32x4_t, 1); out_float32x4_t = vld1q_lane_f32 (0, arg1_float32x4_t, 1);
} }
/* { dg-final { scan-assembler "vld1\.32\[ \]+((\\\{\[dD\]\[0-9\]+\\\[\[0-9\]+\\\]\\\})|(\[dD\]\[0-9\]+\\\[\[0-9\]+\\\])), \\\[\[rR\]\[0-9\]+\\\]!?\(\[ \]+@\[a-zA-Z0-9 \]+\)?\n" } } */ /* { dg-final { scan-assembler "vld1\.32\[ \]+((\\\{\[dD\]\[0-9\]+\\\[\[0-9\]+\\\]\\\})|(\[dD\]\[0-9\]+\\\[\[0-9\]+\\\])), \\\[\[rR\]\[0-9\]+\(:\[0-9\]+\)?\\\]!?\(\[ \]+@\[a-zA-Z0-9 \]+\)?\n" } } */
/* { dg-final { cleanup-saved-temps } } */ /* { dg-final { cleanup-saved-temps } } */
gcc/testsuite/gcc.target/arm/neon/vld1Q_lanep16.c
...@@ -16,5 +16,5 @@ void test_vld1Q_lanep16 (void) ...@@ -16,5 +16,5 @@ void test_vld1Q_lanep16 (void)
out_poly16x8_t = vld1q_lane_p16 (0, arg1_poly16x8_t, 1); out_poly16x8_t = vld1q_lane_p16 (0, arg1_poly16x8_t, 1);
} }
/* { dg-final { scan-assembler "vld1\.16\[ \]+((\\\{\[dD\]\[0-9\]+\\\[\[0-9\]+\\\]\\\})|(\[dD\]\[0-9\]+\\\[\[0-9\]+\\\])), \\\[\[rR\]\[0-9\]+\\\]!?\(\[ \]+@\[a-zA-Z0-9 \]+\)?\n" } } */ /* { dg-final { scan-assembler "vld1\.16\[ \]+((\\\{\[dD\]\[0-9\]+\\\[\[0-9\]+\\\]\\\})|(\[dD\]\[0-9\]+\\\[\[0-9\]+\\\])), \\\[\[rR\]\[0-9\]+\(:\[0-9\]+\)?\\\]!?\(\[ \]+@\[a-zA-Z0-9 \]+\)?\n" } } */
/* { dg-final { cleanup-saved-temps } } */ /* { dg-final { cleanup-saved-temps } } */
gcc/testsuite/gcc.target/arm/neon/vld1Q_lanep8.c
...@@ -16,5 +16,5 @@ void test_vld1Q_lanep8 (void) ...@@ -16,5 +16,5 @@ void test_vld1Q_lanep8 (void)
out_poly8x16_t = vld1q_lane_p8 (0, arg1_poly8x16_t, 1); out_poly8x16_t = vld1q_lane_p8 (0, arg1_poly8x16_t, 1);
} }
/* { dg-final { scan-assembler "vld1\.8\[ \]+((\\\{\[dD\]\[0-9\]+\\\[\[0-9\]+\\\]\\\})|(\[dD\]\[0-9\]+\\\[\[0-9\]+\\\])), \\\[\[rR\]\[0-9\]+\\\]!?\(\[ \]+@\[a-zA-Z0-9 \]+\)?\n" } } */ /* { dg-final { scan-assembler "vld1\.8\[ \]+((\\\{\[dD\]\[0-9\]+\\\[\[0-9\]+\\\]\\\})|(\[dD\]\[0-9\]+\\\[\[0-9\]+\\\])), \\\[\[rR\]\[0-9\]+\(:\[0-9\]+\)?\\\]!?\(\[ \]+@\[a-zA-Z0-9 \]+\)?\n" } } */
/* { dg-final { cleanup-saved-temps } } */ /* { dg-final { cleanup-saved-temps } } */
gcc/testsuite/gcc.target/arm/neon/vld1Q_lanes16.c
...@@ -16,5 +16,5 @@ void test_vld1Q_lanes16 (void) ...@@ -16,5 +16,5 @@ void test_vld1Q_lanes16 (void)
out_int16x8_t = vld1q_lane_s16 (0, arg1_int16x8_t, 1); out_int16x8_t = vld1q_lane_s16 (0, arg1_int16x8_t, 1);
} }
/* { dg-final { scan-assembler "vld1\.16\[ \]+((\\\{\[dD\]\[0-9\]+\\\[\[0-9\]+\\\]\\\})|(\[dD\]\[0-9\]+\\\[\[0-9\]+\\\])), \\\[\[rR\]\[0-9\]+\\\]!?\(\[ \]+@\[a-zA-Z0-9 \]+\)?\n" } } */ /* { dg-final { scan-assembler "vld1\.16\[ \]+((\\\{\[dD\]\[0-9\]+\\\[\[0-9\]+\\\]\\\})|(\[dD\]\[0-9\]+\\\[\[0-9\]+\\\])), \\\[\[rR\]\[0-9\]+\(:\[0-9\]+\)?\\\]!?\(\[ \]+@\[a-zA-Z0-9 \]+\)?\n" } } */
/* { dg-final { cleanup-saved-temps } } */ /* { dg-final { cleanup-saved-temps } } */
gcc/testsuite/gcc.target/arm/neon/vld1Q_lanes32.c
...@@ -16,5 +16,5 @@ void test_vld1Q_lanes32 (void) ...@@ -16,5 +16,5 @@ void test_vld1Q_lanes32 (void)
out_int32x4_t = vld1q_lane_s32 (0, arg1_int32x4_t, 1); out_int32x4_t = vld1q_lane_s32 (0, arg1_int32x4_t, 1);
} }
/* { dg-final { scan-assembler "vld1\.32\[ \]+((\\\{\[dD\]\[0-9\]+\\\[\[0-9\]+\\\]\\\})|(\[dD\]\[0-9\]+\\\[\[0-9\]+\\\])), \\\[\[rR\]\[0-9\]+\\\]!?\(\[ \]+@\[a-zA-Z0-9 \]+\)?\n" } } */ /* { dg-final { scan-assembler "vld1\.32\[ \]+((\\\{\[dD\]\[0-9\]+\\\[\[0-9\]+\\\]\\\})|(\[dD\]\[0-9\]+\\\[\[0-9\]+\\\])), \\\[\[rR\]\[0-9\]+\(:\[0-9\]+\)?\\\]!?\(\[ \]+@\[a-zA-Z0-9 \]+\)?\n" } } */
/* { dg-final { cleanup-saved-temps } } */ /* { dg-final { cleanup-saved-temps } } */
gcc/testsuite/gcc.target/arm/neon/vld1Q_lanes64.c
...@@ -16,5 +16,5 @@ void test_vld1Q_lanes64 (void) ...@@ -16,5 +16,5 @@ void test_vld1Q_lanes64 (void)
out_int64x2_t = vld1q_lane_s64 (0, arg1_int64x2_t, 1); out_int64x2_t = vld1q_lane_s64 (0, arg1_int64x2_t, 1);
} }
/* { dg-final { scan-assembler "vld1\.64\[ \]+((\\\{\[dD\]\[0-9\]+\\\})|(\[dD\]\[0-9\]+)), \\\[\[rR\]\[0-9\]+\\\]!?\(\[ \]+@\[a-zA-Z0-9 \]+\)?\n" } } */ /* { dg-final { scan-assembler "vld1\.64\[ \]+((\\\{\[dD\]\[0-9\]+\\\})|(\[dD\]\[0-9\]+)), \\\[\[rR\]\[0-9\]+\(:\[0-9\]+\)?\\\]!?\(\[ \]+@\[a-zA-Z0-9 \]+\)?\n" } } */
/* { dg-final { cleanup-saved-temps } } */ /* { dg-final { cleanup-saved-temps } } */
gcc/testsuite/gcc.target/arm/neon/vld1Q_lanes8.c
...@@ -16,5 +16,5 @@ void test_vld1Q_lanes8 (void) ...@@ -16,5 +16,5 @@ void test_vld1Q_lanes8 (void)
out_int8x16_t = vld1q_lane_s8 (0, arg1_int8x16_t, 1); out_int8x16_t = vld1q_lane_s8 (0, arg1_int8x16_t, 1);
} }
/* { dg-final { scan-assembler "vld1\.8\[ \]+((\\\{\[dD\]\[0-9\]+\\\[\[0-9\]+\\\]\\\})|(\[dD\]\[0-9\]+\\\[\[0-9\]+\\\])), \\\[\[rR\]\[0-9\]+\\\]!?\(\[ \]+@\[a-zA-Z0-9 \]+\)?\n" } } */ /* { dg-final { scan-assembler "vld1\.8\[ \]+((\\\{\[dD\]\[0-9\]+\\\[\[0-9\]+\\\]\\\})|(\[dD\]\[0-9\]+\\\[\[0-9\]+\\\])), \\\[\[rR\]\[0-9\]+\(:\[0-9\]+\)?\\\]!?\(\[ \]+@\[a-zA-Z0-9 \]+\)?\n" } } */
/* { dg-final { cleanup-saved-temps } } */ /* { dg-final { cleanup-saved-temps } } */
gcc/testsuite/gcc.target/arm/neon/vld1Q_laneu16.c
...@@ -16,5 +16,5 @@ void test_vld1Q_laneu16 (void) ...@@ -16,5 +16,5 @@ void test_vld1Q_laneu16 (void)
out_uint16x8_t = vld1q_lane_u16 (0, arg1_uint16x8_t, 1); out_uint16x8_t = vld1q_lane_u16 (0, arg1_uint16x8_t, 1);
} }
/* { dg-final { scan-assembler "vld1\.16\[ \]+((\\\{\[dD\]\[0-9\]+\\\[\[0-9\]+\\\]\\\})|(\[dD\]\[0-9\]+\\\[\[0-9\]+\\\])), \\\[\[rR\]\[0-9\]+\\\]!?\(\[ \]+@\[a-zA-Z0-9 \]+\)?\n" } } */ /* { dg-final { scan-assembler "vld1\.16\[ \]+((\\\{\[dD\]\[0-9\]+\\\[\[0-9\]+\\\]\\\})|(\[dD\]\[0-9\]+\\\[\[0-9\]+\\\])), \\\[\[rR\]\[0-9\]+\(:\[0-9\]+\)?\\\]!?\(\[ \]+@\[a-zA-Z0-9 \]+\)?\n" } } */
/* { dg-final { cleanup-saved-temps } } */ /* { dg-final { cleanup-saved-temps } } */
gcc/testsuite/gcc.target/arm/neon/vld1Q_laneu32.c
...@@ -16,5 +16,5 @@ void test_vld1Q_laneu32 (void) ...@@ -16,5 +16,5 @@ void test_vld1Q_laneu32 (void)
out_uint32x4_t = vld1q_lane_u32 (0, arg1_uint32x4_t, 1); out_uint32x4_t = vld1q_lane_u32 (0, arg1_uint32x4_t, 1);
} }
/* { dg-final { scan-assembler "vld1\.32\[ \]+((\\\{\[dD\]\[0-9\]+\\\[\[0-9\]+\\\]\\\})|(\[dD\]\[0-9\]+\\\[\[0-9\]+\\\])), \\\[\[rR\]\[0-9\]+\\\]!?\(\[ \]+@\[a-zA-Z0-9 \]+\)?\n" } } */ /* { dg-final { scan-assembler "vld1\.32\[ \]+((\\\{\[dD\]\[0-9\]+\\\[\[0-9\]+\\\]\\\})|(\[dD\]\[0-9\]+\\\[\[0-9\]+\\\])), \\\[\[rR\]\[0-9\]+\(:\[0-9\]+\)?\\\]!?\(\[ \]+@\[a-zA-Z0-9 \]+\)?\n" } } */
/* { dg-final { cleanup-saved-temps } } */ /* { dg-final { cleanup-saved-temps } } */
gcc/testsuite/gcc.target/arm/neon/vld1Q_laneu64.c
...@@ -16,5 +16,5 @@ void test_vld1Q_laneu64 (void) ...@@ -16,5 +16,5 @@ void test_vld1Q_laneu64 (void)
out_uint64x2_t = vld1q_lane_u64 (0, arg1_uint64x2_t, 1); out_uint64x2_t = vld1q_lane_u64 (0, arg1_uint64x2_t, 1);
} }
/* { dg-final { scan-assembler "vld1\.64\[ \]+((\\\{\[dD\]\[0-9\]+\\\})|(\[dD\]\[0-9\]+)), \\\[\[rR\]\[0-9\]+\\\]!?\(\[ \]+@\[a-zA-Z0-9 \]+\)?\n" } } */ /* { dg-final { scan-assembler "vld1\.64\[ \]+((\\\{\[dD\]\[0-9\]+\\\})|(\[dD\]\[0-9\]+)), \\\[\[rR\]\[0-9\]+\(:\[0-9\]+\)?\\\]!?\(\[ \]+@\[a-zA-Z0-9 \]+\)?\n" } } */
/* { dg-final { cleanup-saved-temps } } */ /* { dg-final { cleanup-saved-temps } } */
gcc/testsuite/gcc.target/arm/neon/vld1Q_laneu8.c
...@@ -16,5 +16,5 @@ void test_vld1Q_laneu8 (void) ...@@ -16,5 +16,5 @@ void test_vld1Q_laneu8 (void)
out_uint8x16_t = vld1q_lane_u8 (0, arg1_uint8x16_t, 1); out_uint8x16_t = vld1q_lane_u8 (0, arg1_uint8x16_t, 1);
} }
/* { dg-final { scan-assembler "vld1\.8\[ \]+((\\\{\[dD\]\[0-9\]+\\\[\[0-9\]+\\\]\\\})|(\[dD\]\[0-9\]+\\\[\[0-9\]+\\\])), \\\[\[rR\]\[0-9\]+\\\]!?\(\[ \]+@\[a-zA-Z0-9 \]+\)?\n" } } */ /* { dg-final { scan-assembler "vld1\.8\[ \]+((\\\{\[dD\]\[0-9\]+\\\[\[0-9\]+\\\]\\\})|(\[dD\]\[0-9\]+\\\[\[0-9\]+\\\])), \\\[\[rR\]\[0-9\]+\(:\[0-9\]+\)?\\\]!?\(\[ \]+@\[a-zA-Z0-9 \]+\)?\n" } } */
/* { dg-final { cleanup-saved-temps } } */ /* { dg-final { cleanup-saved-temps } } */
gcc/testsuite/gcc.target/arm/neon/vld1Qf32.c
...@@ -15,5 +15,5 @@ void test_vld1Qf32 (void) ...@@ -15,5 +15,5 @@ void test_vld1Qf32 (void)
out_float32x4_t = vld1q_f32 (0); out_float32x4_t = vld1q_f32 (0);
} }
/* { dg-final { scan-assembler "vld1\.32\[ \]+\\\{((\[dD\]\[0-9\]+-\[dD\]\[0-9\]+)|(\[dD\]\[0-9\]+, \[dD\]\[0-9\]+))\\\}, \\\[\[rR\]\[0-9\]+\\\]!?\(\[ \]+@\[a-zA-Z0-9 \]+\)?\n" } } */ /* { dg-final { scan-assembler "vld1\.32\[ \]+\\\{((\[dD\]\[0-9\]+-\[dD\]\[0-9\]+)|(\[dD\]\[0-9\]+, \[dD\]\[0-9\]+))\\\}, \\\[\[rR\]\[0-9\]+\(:\[0-9\]+\)?\\\]!?\(\[ \]+@\[a-zA-Z0-9 \]+\)?\n" } } */
/* { dg-final { cleanup-saved-temps } } */ /* { dg-final { cleanup-saved-temps } } */
gcc/testsuite/gcc.target/arm/neon/vld1Qp16.c
...@@ -15,5 +15,5 @@ void test_vld1Qp16 (void) ...@@ -15,5 +15,5 @@ void test_vld1Qp16 (void)
out_poly16x8_t = vld1q_p16 (0); out_poly16x8_t = vld1q_p16 (0);
} }
/* { dg-final { scan-assembler "vld1\.16\[ \]+\\\{((\[dD\]\[0-9\]+-\[dD\]\[0-9\]+)|(\[dD\]\[0-9\]+, \[dD\]\[0-9\]+))\\\}, \\\[\[rR\]\[0-9\]+\\\]!?\(\[ \]+@\[a-zA-Z0-9 \]+\)?\n" } } */ /* { dg-final { scan-assembler "vld1\.16\[ \]+\\\{((\[dD\]\[0-9\]+-\[dD\]\[0-9\]+)|(\[dD\]\[0-9\]+, \[dD\]\[0-9\]+))\\\}, \\\[\[rR\]\[0-9\]+\(:\[0-9\]+\)?\\\]!?\(\[ \]+@\[a-zA-Z0-9 \]+\)?\n" } } */
/* { dg-final { cleanup-saved-temps } } */ /* { dg-final { cleanup-saved-temps } } */
gcc/testsuite/gcc.target/arm/neon/vld1Qp8.c
...@@ -15,5 +15,5 @@ void test_vld1Qp8 (void) ...@@ -15,5 +15,5 @@ void test_vld1Qp8 (void)
out_poly8x16_t = vld1q_p8 (0); out_poly8x16_t = vld1q_p8 (0);
} }
/* { dg-final { scan-assembler "vld1\.8\[ \]+\\\{((\[dD\]\[0-9\]+-\[dD\]\[0-9\]+)|(\[dD\]\[0-9\]+, \[dD\]\[0-9\]+))\\\}, \\\[\[rR\]\[0-9\]+\\\]!?\(\[ \]+@\[a-zA-Z0-9 \]+\)?\n" } } */ /* { dg-final { scan-assembler "vld1\.8\[ \]+\\\{((\[dD\]\[0-9\]+-\[dD\]\[0-9\]+)|(\[dD\]\[0-9\]+, \[dD\]\[0-9\]+))\\\}, \\\[\[rR\]\[0-9\]+\(:\[0-9\]+\)?\\\]!?\(\[ \]+@\[a-zA-Z0-9 \]+\)?\n" } } */
/* { dg-final { cleanup-saved-temps } } */ /* { dg-final { cleanup-saved-temps } } */
gcc/testsuite/gcc.target/arm/neon/vld1Qs16.c
...@@ -15,5 +15,5 @@ void test_vld1Qs16 (void) ...@@ -15,5 +15,5 @@ void test_vld1Qs16 (void)
out_int16x8_t = vld1q_s16 (0); out_int16x8_t = vld1q_s16 (0);
} }
/* { dg-final { scan-assembler "vld1\.16\[ \]+\\\{((\[dD\]\[0-9\]+-\[dD\]\[0-9\]+)|(\[dD\]\[0-9\]+, \[dD\]\[0-9\]+))\\\}, \\\[\[rR\]\[0-9\]+\\\]!?\(\[ \]+@\[a-zA-Z0-9 \]+\)?\n" } } */ /* { dg-final { scan-assembler "vld1\.16\[ \]+\\\{((\[dD\]\[0-9\]+-\[dD\]\[0-9\]+)|(\[dD\]\[0-9\]+, \[dD\]\[0-9\]+))\\\}, \\\[\[rR\]\[0-9\]+\(:\[0-9\]+\)?\\\]!?\(\[ \]+@\[a-zA-Z0-9 \]+\)?\n" } } */
/* { dg-final { cleanup-saved-temps } } */ /* { dg-final { cleanup-saved-temps } } */
gcc/testsuite/gcc.target/arm/neon/vld1Qs32.c
...@@ -15,5 +15,5 @@ void test_vld1Qs32 (void) ...@@ -15,5 +15,5 @@ void test_vld1Qs32 (void)
out_int32x4_t = vld1q_s32 (0); out_int32x4_t = vld1q_s32 (0);
} }
/* { dg-final { scan-assembler "vld1\.32\[ \]+\\\{((\[dD\]\[0-9\]+-\[dD\]\[0-9\]+)|(\[dD\]\[0-9\]+, \[dD\]\[0-9\]+))\\\}, \\\[\[rR\]\[0-9\]+\\\]!?\(\[ \]+@\[a-zA-Z0-9 \]+\)?\n" } } */ /* { dg-final { scan-assembler "vld1\.32\[ \]+\\\{((\[dD\]\[0-9\]+-\[dD\]\[0-9\]+)|(\[dD\]\[0-9\]+, \[dD\]\[0-9\]+))\\\}, \\\[\[rR\]\[0-9\]+\(:\[0-9\]+\)?\\\]!?\(\[ \]+@\[a-zA-Z0-9 \]+\)?\n" } } */
/* { dg-final { cleanup-saved-temps } } */ /* { dg-final { cleanup-saved-temps } } */
gcc/testsuite/gcc.target/arm/neon/vld1Qs64.c
...@@ -15,5 +15,5 @@ void test_vld1Qs64 (void) ...@@ -15,5 +15,5 @@ void test_vld1Qs64 (void)
out_int64x2_t = vld1q_s64 (0); out_int64x2_t = vld1q_s64 (0);
} }
/* { dg-final { scan-assembler "vld1\.64\[ \]+\\\{((\[dD\]\[0-9\]+-\[dD\]\[0-9\]+)|(\[dD\]\[0-9\]+, \[dD\]\[0-9\]+))\\\}, \\\[\[rR\]\[0-9\]+\\\]!?\(\[ \]+@\[a-zA-Z0-9 \]+\)?\n" } } */ /* { dg-final { scan-assembler "vld1\.64\[ \]+\\\{((\[dD\]\[0-9\]+-\[dD\]\[0-9\]+)|(\[dD\]\[0-9\]+, \[dD\]\[0-9\]+))\\\}, \\\[\[rR\]\[0-9\]+\(:\[0-9\]+\)?\\\]!?\(\[ \]+@\[a-zA-Z0-9 \]+\)?\n" } } */
/* { dg-final { cleanup-saved-temps } } */ /* { dg-final { cleanup-saved-temps } } */
gcc/testsuite/gcc.target/arm/neon/vld1Qs8.c
...@@ -15,5 +15,5 @@ void test_vld1Qs8 (void) ...@@ -15,5 +15,5 @@ void test_vld1Qs8 (void)
out_int8x16_t = vld1q_s8 (0); out_int8x16_t = vld1q_s8 (0);
} }
/* { dg-final { scan-assembler "vld1\.8\[ \]+\\\{((\[dD\]\[0-9\]+-\[dD\]\[0-9\]+)|(\[dD\]\[0-9\]+, \[dD\]\[0-9\]+))\\\}, \\\[\[rR\]\[0-9\]+\\\]!?\(\[ \]+@\[a-zA-Z0-9 \]+\)?\n" } } */ /* { dg-final { scan-assembler "vld1\.8\[ \]+\\\{((\[dD\]\[0-9\]+-\[dD\]\[0-9\]+)|(\[dD\]\[0-9\]+, \[dD\]\[0-9\]+))\\\}, \\\[\[rR\]\[0-9\]+\(:\[0-9\]+\)?\\\]!?\(\[ \]+@\[a-zA-Z0-9 \]+\)?\n" } } */
/* { dg-final { cleanup-saved-temps } } */ /* { dg-final { cleanup-saved-temps } } */
gcc/testsuite/gcc.target/arm/neon/vld1Qu16.c
...@@ -15,5 +15,5 @@ void test_vld1Qu16 (void) ...@@ -15,5 +15,5 @@ void test_vld1Qu16 (void)
out_uint16x8_t = vld1q_u16 (0); out_uint16x8_t = vld1q_u16 (0);
} }
/* { dg-final { scan-assembler "vld1\.16\[ \]+\\\{((\[dD\]\[0-9\]+-\[dD\]\[0-9\]+)|(\[dD\]\[0-9\]+, \[dD\]\[0-9\]+))\\\}, \\\[\[rR\]\[0-9\]+\\\]!?\(\[ \]+@\[a-zA-Z0-9 \]+\)?\n" } } */ /* { dg-final { scan-assembler "vld1\.16\[ \]+\\\{((\[dD\]\[0-9\]+-\[dD\]\[0-9\]+)|(\[dD\]\[0-9\]+, \[dD\]\[0-9\]+))\\\}, \\\[\[rR\]\[0-9\]+\(:\[0-9\]+\)?\\\]!?\(\[ \]+@\[a-zA-Z0-9 \]+\)?\n" } } */
/* { dg-final { cleanup-saved-temps } } */ /* { dg-final { cleanup-saved-temps } } */
gcc/testsuite/gcc.target/arm/neon/vld1Qu32.c
...@@ -15,5 +15,5 @@ void test_vld1Qu32 (void) ...@@ -15,5 +15,5 @@ void test_vld1Qu32 (void)
out_uint32x4_t = vld1q_u32 (0); out_uint32x4_t = vld1q_u32 (0);
} }
/* { dg-final { scan-assembler "vld1\.32\[ \]+\\\{((\[dD\]\[0-9\]+-\[dD\]\[0-9\]+)|(\[dD\]\[0-9\]+, \[dD\]\[0-9\]+))\\\}, \\\[\[rR\]\[0-9\]+\\\]!?\(\[ \]+@\[a-zA-Z0-9 \]+\)?\n" } } */ /* { dg-final { scan-assembler "vld1\.32\[ \]+\\\{((\[dD\]\[0-9\]+-\[dD\]\[0-9\]+)|(\[dD\]\[0-9\]+, \[dD\]\[0-9\]+))\\\}, \\\[\[rR\]\[0-9\]+\(:\[0-9\]+\)?\\\]!?\(\[ \]+@\[a-zA-Z0-9 \]+\)?\n" } } */
/* { dg-final { cleanup-saved-temps } } */ /* { dg-final { cleanup-saved-temps } } */
gcc/testsuite/gcc.target/arm/neon/vld1Qu64.c
...@@ -15,5 +15,5 @@ void test_vld1Qu64 (void) ...@@ -15,5 +15,5 @@ void test_vld1Qu64 (void)
out_uint64x2_t = vld1q_u64 (0); out_uint64x2_t = vld1q_u64 (0);
} }
/* { dg-final { scan-assembler "vld1\.64\[ \]+\\\{((\[dD\]\[0-9\]+-\[dD\]\[0-9\]+)|(\[dD\]\[0-9\]+, \[dD\]\[0-9\]+))\\\}, \\\[\[rR\]\[0-9\]+\\\]!?\(\[ \]+@\[a-zA-Z0-9 \]+\)?\n" } } */ /* { dg-final { scan-assembler "vld1\.64\[ \]+\\\{((\[dD\]\[0-9\]+-\[dD\]\[0-9\]+)|(\[dD\]\[0-9\]+, \[dD\]\[0-9\]+))\\\}, \\\[\[rR\]\[0-9\]+\(:\[0-9\]+\)?\\\]!?\(\[ \]+@\[a-zA-Z0-9 \]+\)?\n" } } */
/* { dg-final { cleanup-saved-temps } } */ /* { dg-final { cleanup-saved-temps } } */
gcc/testsuite/gcc.target/arm/neon/vld1Qu8.c
...@@ -15,5 +15,5 @@ void test_vld1Qu8 (void) ...@@ -15,5 +15,5 @@ void test_vld1Qu8 (void)
out_uint8x16_t = vld1q_u8 (0); out_uint8x16_t = vld1q_u8 (0);
} }
/* { dg-final { scan-assembler "vld1\.8\[ \]+\\\{((\[dD\]\[0-9\]+-\[dD\]\[0-9\]+)|(\[dD\]\[0-9\]+, \[dD\]\[0-9\]+))\\\}, \\\[\[rR\]\[0-9\]+\\\]!?\(\[ \]+@\[a-zA-Z0-9 \]+\)?\n" } } */ /* { dg-final { scan-assembler "vld1\.8\[ \]+\\\{((\[dD\]\[0-9\]+-\[dD\]\[0-9\]+)|(\[dD\]\[0-9\]+, \[dD\]\[0-9\]+))\\\}, \\\[\[rR\]\[0-9\]+\(:\[0-9\]+\)?\\\]!?\(\[ \]+@\[a-zA-Z0-9 \]+\)?\n" } } */
/* { dg-final { cleanup-saved-temps } } */ /* { dg-final { cleanup-saved-temps } } */
gcc/testsuite/gcc.target/arm/neon/vld1_dupf32.c
...@@ -15,5 +15,5 @@ void test_vld1_dupf32 (void) ...@@ -15,5 +15,5 @@ void test_vld1_dupf32 (void)
out_float32x2_t = vld1_dup_f32 (0); out_float32x2_t = vld1_dup_f32 (0);
} }
/* { dg-final { scan-assembler "vld1\.32\[ \]+((\\\{\[dD\]\[0-9\]+\\\[\\\]\\\})|(\[dD\]\[0-9\]+\\\[\\\])), \\\[\[rR\]\[0-9\]+\\\]!?\(\[ \]+@\[a-zA-Z0-9 \]+\)?\n" } } */ /* { dg-final { scan-assembler "vld1\.32\[ \]+((\\\{\[dD\]\[0-9\]+\\\[\\\]\\\})|(\[dD\]\[0-9\]+\\\[\\\])), \\\[\[rR\]\[0-9\]+\(:\[0-9\]+\)?\\\]!?\(\[ \]+@\[a-zA-Z0-9 \]+\)?\n" } } */
/* { dg-final { cleanup-saved-temps } } */ /* { dg-final { cleanup-saved-temps } } */
gcc/testsuite/gcc.target/arm/neon/vld1_dupp16.c
...@@ -15,5 +15,5 @@ void test_vld1_dupp16 (void) ...@@ -15,5 +15,5 @@ void test_vld1_dupp16 (void)
out_poly16x4_t = vld1_dup_p16 (0); out_poly16x4_t = vld1_dup_p16 (0);
} }
/* { dg-final { scan-assembler "vld1\.16\[ \]+((\\\{\[dD\]\[0-9\]+\\\[\\\]\\\})|(\[dD\]\[0-9\]+\\\[\\\])), \\\[\[rR\]\[0-9\]+\\\]!?\(\[ \]+@\[a-zA-Z0-9 \]+\)?\n" } } */ /* { dg-final { scan-assembler "vld1\.16\[ \]+((\\\{\[dD\]\[0-9\]+\\\[\\\]\\\})|(\[dD\]\[0-9\]+\\\[\\\])), \\\[\[rR\]\[0-9\]+\(:\[0-9\]+\)?\\\]!?\(\[ \]+@\[a-zA-Z0-9 \]+\)?\n" } } */
/* { dg-final { cleanup-saved-temps } } */ /* { dg-final { cleanup-saved-temps } } */
gcc/testsuite/gcc.target/arm/neon/vld1_dupp8.c
...@@ -15,5 +15,5 @@ void test_vld1_dupp8 (void) ...@@ -15,5 +15,5 @@ void test_vld1_dupp8 (void)
out_poly8x8_t = vld1_dup_p8 (0); out_poly8x8_t = vld1_dup_p8 (0);
} }
/* { dg-final { scan-assembler "vld1\.8\[ \]+((\\\{\[dD\]\[0-9\]+\\\[\\\]\\\})|(\[dD\]\[0-9\]+\\\[\\\])), \\\[\[rR\]\[0-9\]+\\\]!?\(\[ \]+@\[a-zA-Z0-9 \]+\)?\n" } } */ /* { dg-final { scan-assembler "vld1\.8\[ \]+((\\\{\[dD\]\[0-9\]+\\\[\\\]\\\})|(\[dD\]\[0-9\]+\\\[\\\])), \\\[\[rR\]\[0-9\]+\(:\[0-9\]+\)?\\\]!?\(\[ \]+@\[a-zA-Z0-9 \]+\)?\n" } } */
/* { dg-final { cleanup-saved-temps } } */ /* { dg-final { cleanup-saved-temps } } */
gcc/testsuite/gcc.target/arm/neon/vld1_dups16.c
...@@ -15,5 +15,5 @@ void test_vld1_dups16 (void) ...@@ -15,5 +15,5 @@ void test_vld1_dups16 (void)
out_int16x4_t = vld1_dup_s16 (0); out_int16x4_t = vld1_dup_s16 (0);
} }
/* { dg-final { scan-assembler "vld1\.16\[ \]+((\\\{\[dD\]\[0-9\]+\\\[\\\]\\\})|(\[dD\]\[0-9\]+\\\[\\\])), \\\[\[rR\]\[0-9\]+\\\]!?\(\[ \]+@\[a-zA-Z0-9 \]+\)?\n" } } */ /* { dg-final { scan-assembler "vld1\.16\[ \]+((\\\{\[dD\]\[0-9\]+\\\[\\\]\\\})|(\[dD\]\[0-9\]+\\\[\\\])), \\\[\[rR\]\[0-9\]+\(:\[0-9\]+\)?\\\]!?\(\[ \]+@\[a-zA-Z0-9 \]+\)?\n" } } */
/* { dg-final { cleanup-saved-temps } } */ /* { dg-final { cleanup-saved-temps } } */
gcc/testsuite/gcc.target/arm/neon/vld1_dups32.c
...@@ -15,5 +15,5 @@ void test_vld1_dups32 (void) ...@@ -15,5 +15,5 @@ void test_vld1_dups32 (void)
out_int32x2_t = vld1_dup_s32 (0); out_int32x2_t = vld1_dup_s32 (0);
} }
/* { dg-final { scan-assembler "vld1\.32\[ \]+((\\\{\[dD\]\[0-9\]+\\\[\\\]\\\})|(\[dD\]\[0-9\]+\\\[\\\])), \\\[\[rR\]\[0-9\]+\\\]!?\(\[ \]+@\[a-zA-Z0-9 \]+\)?\n" } } */ /* { dg-final { scan-assembler "vld1\.32\[ \]+((\\\{\[dD\]\[0-9\]+\\\[\\\]\\\})|(\[dD\]\[0-9\]+\\\[\\\])), \\\[\[rR\]\[0-9\]+\(:\[0-9\]+\)?\\\]!?\(\[ \]+@\[a-zA-Z0-9 \]+\)?\n" } } */
/* { dg-final { cleanup-saved-temps } } */ /* { dg-final { cleanup-saved-temps } } */
gcc/testsuite/gcc.target/arm/neon/vld1_dups64.c
...@@ -15,5 +15,5 @@ void test_vld1_dups64 (void) ...@@ -15,5 +15,5 @@ void test_vld1_dups64 (void)
out_int64x1_t = vld1_dup_s64 (0); out_int64x1_t = vld1_dup_s64 (0);
} }
/* { dg-final { scan-assembler "vld1\.64\[ \]+((\\\{\[dD\]\[0-9\]+\\\})|(\[dD\]\[0-9\]+)), \\\[\[rR\]\[0-9\]+\\\]!?\(\[ \]+@\[a-zA-Z0-9 \]+\)?\n" } } */ /* { dg-final { scan-assembler "vld1\.64\[ \]+((\\\{\[dD\]\[0-9\]+\\\})|(\[dD\]\[0-9\]+)), \\\[\[rR\]\[0-9\]+\(:\[0-9\]+\)?\\\]!?\(\[ \]+@\[a-zA-Z0-9 \]+\)?\n" } } */
/* { dg-final { cleanup-saved-temps } } */ /* { dg-final { cleanup-saved-temps } } */
gcc/testsuite/gcc.target/arm/neon/vld1_dups8.c
...@@ -15,5 +15,5 @@ void test_vld1_dups8 (void) ...@@ -15,5 +15,5 @@ void test_vld1_dups8 (void)
out_int8x8_t = vld1_dup_s8 (0); out_int8x8_t = vld1_dup_s8 (0);
} }
/* { dg-final { scan-assembler "vld1\.8\[ \]+((\\\{\[dD\]\[0-9\]+\\\[\\\]\\\})|(\[dD\]\[0-9\]+\\\[\\\])), \\\[\[rR\]\[0-9\]+\\\]!?\(\[ \]+@\[a-zA-Z0-9 \]+\)?\n" } } */ /* { dg-final { scan-assembler "vld1\.8\[ \]+((\\\{\[dD\]\[0-9\]+\\\[\\\]\\\})|(\[dD\]\[0-9\]+\\\[\\\])), \\\[\[rR\]\[0-9\]+\(:\[0-9\]+\)?\\\]!?\(\[ \]+@\[a-zA-Z0-9 \]+\)?\n" } } */
/* { dg-final { cleanup-saved-temps } } */ /* { dg-final { cleanup-saved-temps } } */
gcc/testsuite/gcc.target/arm/neon/vld1_dupu16.c
...@@ -15,5 +15,5 @@ void test_vld1_dupu16 (void) ...@@ -15,5 +15,5 @@ void test_vld1_dupu16 (void)
out_uint16x4_t = vld1_dup_u16 (0); out_uint16x4_t = vld1_dup_u16 (0);
} }
/* { dg-final { scan-assembler "vld1\.16\[ \]+((\\\{\[dD\]\[0-9\]+\\\[\\\]\\\})|(\[dD\]\[0-9\]+\\\[\\\])), \\\[\[rR\]\[0-9\]+\\\]!?\(\[ \]+@\[a-zA-Z0-9 \]+\)?\n" } } */ /* { dg-final { scan-assembler "vld1\.16\[ \]+((\\\{\[dD\]\[0-9\]+\\\[\\\]\\\})|(\[dD\]\[0-9\]+\\\[\\\])), \\\[\[rR\]\[0-9\]+\(:\[0-9\]+\)?\\\]!?\(\[ \]+@\[a-zA-Z0-9 \]+\)?\n" } } */
/* { dg-final { cleanup-saved-temps } } */ /* { dg-final { cleanup-saved-temps } } */
gcc/testsuite/gcc.target/arm/neon/vld1_dupu32.c
...@@ -15,5 +15,5 @@ void test_vld1_dupu32 (void) ...@@ -15,5 +15,5 @@ void test_vld1_dupu32 (void)
out_uint32x2_t = vld1_dup_u32 (0); out_uint32x2_t = vld1_dup_u32 (0);
} }
/* { dg-final { scan-assembler "vld1\.32\[ \]+((\\\{\[dD\]\[0-9\]+\\\[\\\]\\\})|(\[dD\]\[0-9\]+\\\[\\\])), \\\[\[rR\]\[0-9\]+\\\]!?\(\[ \]+@\[a-zA-Z0-9 \]+\)?\n" } } */ /* { dg-final { scan-assembler "vld1\.32\[ \]+((\\\{\[dD\]\[0-9\]+\\\[\\\]\\\})|(\[dD\]\[0-9\]+\\\[\\\])), \\\[\[rR\]\[0-9\]+\(:\[0-9\]+\)?\\\]!?\(\[ \]+@\[a-zA-Z0-9 \]+\)?\n" } } */
/* { dg-final { cleanup-saved-temps } } */ /* { dg-final { cleanup-saved-temps } } */
gcc/testsuite/gcc.target/arm/neon/vld1_dupu64.c
...@@ -15,5 +15,5 @@ void test_vld1_dupu64 (void) ...@@ -15,5 +15,5 @@ void test_vld1_dupu64 (void)
out_uint64x1_t = vld1_dup_u64 (0); out_uint64x1_t = vld1_dup_u64 (0);
} }
/* { dg-final { scan-assembler "vld1\.64\[ \]+((\\\{\[dD\]\[0-9\]+\\\})|(\[dD\]\[0-9\]+)), \\\[\[rR\]\[0-9\]+\\\]!?\(\[ \]+@\[a-zA-Z0-9 \]+\)?\n" } } */ /* { dg-final { scan-assembler "vld1\.64\[ \]+((\\\{\[dD\]\[0-9\]+\\\})|(\[dD\]\[0-9\]+)), \\\[\[rR\]\[0-9\]+\(:\[0-9\]+\)?\\\]!?\(\[ \]+@\[a-zA-Z0-9 \]+\)?\n" } } */
/* { dg-final { cleanup-saved-temps } } */ /* { dg-final { cleanup-saved-temps } } */
gcc/testsuite/gcc.target/arm/neon/vld1_dupu8.c
...@@ -15,5 +15,5 @@ void test_vld1_dupu8 (void) ...@@ -15,5 +15,5 @@ void test_vld1_dupu8 (void)
out_uint8x8_t = vld1_dup_u8 (0); out_uint8x8_t = vld1_dup_u8 (0);
} }
/* { dg-final { scan-assembler "vld1\.8\[ \]+((\\\{\[dD\]\[0-9\]+\\\[\\\]\\\})|(\[dD\]\[0-9\]+\\\[\\\])), \\\[\[rR\]\[0-9\]+\\\]!?\(\[ \]+@\[a-zA-Z0-9 \]+\)?\n" } } */ /* { dg-final { scan-assembler "vld1\.8\[ \]+((\\\{\[dD\]\[0-9\]+\\\[\\\]\\\})|(\[dD\]\[0-9\]+\\\[\\\])), \\\[\[rR\]\[0-9\]+\(:\[0-9\]+\)?\\\]!?\(\[ \]+@\[a-zA-Z0-9 \]+\)?\n" } } */
/* { dg-final { cleanup-saved-temps } } */ /* { dg-final { cleanup-saved-temps } } */
gcc/testsuite/gcc.target/arm/neon/vld1_lanef32.c
...@@ -16,5 +16,5 @@ void test_vld1_lanef32 (void) ...@@ -16,5 +16,5 @@ void test_vld1_lanef32 (void)
out_float32x2_t = vld1_lane_f32 (0, arg1_float32x2_t, 1); out_float32x2_t = vld1_lane_f32 (0, arg1_float32x2_t, 1);
} }
/* { dg-final { scan-assembler "vld1\.32\[ \]+((\\\{\[dD\]\[0-9\]+\\\[\[0-9\]+\\\]\\\})|(\[dD\]\[0-9\]+\\\[\[0-9\]+\\\])), \\\[\[rR\]\[0-9\]+\\\]!?\(\[ \]+@\[a-zA-Z0-9 \]+\)?\n" } } */ /* { dg-final { scan-assembler "vld1\.32\[ \]+((\\\{\[dD\]\[0-9\]+\\\[\[0-9\]+\\\]\\\})|(\[dD\]\[0-9\]+\\\[\[0-9\]+\\\])), \\\[\[rR\]\[0-9\]+\(:\[0-9\]+\)?\\\]!?\(\[ \]+@\[a-zA-Z0-9 \]+\)?\n" } } */
/* { dg-final { cleanup-saved-temps } } */ /* { dg-final { cleanup-saved-temps } } */
gcc/testsuite/gcc.target/arm/neon/vld1_lanep16.c
...@@ -16,5 +16,5 @@ void test_vld1_lanep16 (void) ...@@ -16,5 +16,5 @@ void test_vld1_lanep16 (void)
out_poly16x4_t = vld1_lane_p16 (0, arg1_poly16x4_t, 1); out_poly16x4_t = vld1_lane_p16 (0, arg1_poly16x4_t, 1);
} }
/* { dg-final { scan-assembler "vld1\.16\[ \]+((\\\{\[dD\]\[0-9\]+\\\[\[0-9\]+\\\]\\\})|(\[dD\]\[0-9\]+\\\[\[0-9\]+\\\])), \\\[\[rR\]\[0-9\]+\\\]!?\(\[ \]+@\[a-zA-Z0-9 \]+\)?\n" } } */ /* { dg-final { scan-assembler "vld1\.16\[ \]+((\\\{\[dD\]\[0-9\]+\\\[\[0-9\]+\\\]\\\})|(\[dD\]\[0-9\]+\\\[\[0-9\]+\\\])), \\\[\[rR\]\[0-9\]+\(:\[0-9\]+\)?\\\]!?\(\[ \]+@\[a-zA-Z0-9 \]+\)?\n" } } */
/* { dg-final { cleanup-saved-temps } } */ /* { dg-final { cleanup-saved-temps } } */
gcc/testsuite/gcc.target/arm/neon/vld1_lanep8.c
...@@ -16,5 +16,5 @@ void test_vld1_lanep8 (void) ...@@ -16,5 +16,5 @@ void test_vld1_lanep8 (void)
out_poly8x8_t = vld1_lane_p8 (0, arg1_poly8x8_t, 1); out_poly8x8_t = vld1_lane_p8 (0, arg1_poly8x8_t, 1);
} }
/* { dg-final { scan-assembler "vld1\.8\[ \]+((\\\{\[dD\]\[0-9\]+\\\[\[0-9\]+\\\]\\\})|(\[dD\]\[0-9\]+\\\[\[0-9\]+\\\])), \\\[\[rR\]\[0-9\]+\\\]!?\(\[ \]+@\[a-zA-Z0-9 \]+\)?\n" } } */ /* { dg-final { scan-assembler "vld1\.8\[ \]+((\\\{\[dD\]\[0-9\]+\\\[\[0-9\]+\\\]\\\})|(\[dD\]\[0-9\]+\\\[\[0-9\]+\\\])), \\\[\[rR\]\[0-9\]+\(:\[0-9\]+\)?\\\]!?\(\[ \]+@\[a-zA-Z0-9 \]+\)?\n" } } */
/* { dg-final { cleanup-saved-temps } } */ /* { dg-final { cleanup-saved-temps } } */
gcc/testsuite/gcc.target/arm/neon/vld1_lanes16.c
...@@ -16,5 +16,5 @@ void test_vld1_lanes16 (void) ...@@ -16,5 +16,5 @@ void test_vld1_lanes16 (void)
out_int16x4_t = vld1_lane_s16 (0, arg1_int16x4_t, 1); out_int16x4_t = vld1_lane_s16 (0, arg1_int16x4_t, 1);
} }
/* { dg-final { scan-assembler "vld1\.16\[ \]+((\\\{\[dD\]\[0-9\]+\\\[\[0-9\]+\\\]\\\})|(\[dD\]\[0-9\]+\\\[\[0-9\]+\\\])), \\\[\[rR\]\[0-9\]+\\\]!?\(\[ \]+@\[a-zA-Z0-9 \]+\)?\n" } } */ /* { dg-final { scan-assembler "vld1\.16\[ \]+((\\\{\[dD\]\[0-9\]+\\\[\[0-9\]+\\\]\\\})|(\[dD\]\[0-9\]+\\\[\[0-9\]+\\\])), \\\[\[rR\]\[0-9\]+\(:\[0-9\]+\)?\\\]!?\(\[ \]+@\[a-zA-Z0-9 \]+\)?\n" } } */
/* { dg-final { cleanup-saved-temps } } */ /* { dg-final { cleanup-saved-temps } } */
gcc/testsuite/gcc.target/arm/neon/vld1_lanes32.c
...@@ -16,5 +16,5 @@ void test_vld1_lanes32 (void) ...@@ -16,5 +16,5 @@ void test_vld1_lanes32 (void)
out_int32x2_t = vld1_lane_s32 (0, arg1_int32x2_t, 1); out_int32x2_t = vld1_lane_s32 (0, arg1_int32x2_t, 1);
} }
/* { dg-final { scan-assembler "vld1\.32\[ \]+((\\\{\[dD\]\[0-9\]+\\\[\[0-9\]+\\\]\\\})|(\[dD\]\[0-9\]+\\\[\[0-9\]+\\\])), \\\[\[rR\]\[0-9\]+\\\]!?\(\[ \]+@\[a-zA-Z0-9 \]+\)?\n" } } */ /* { dg-final { scan-assembler "vld1\.32\[ \]+((\\\{\[dD\]\[0-9\]+\\\[\[0-9\]+\\\]\\\})|(\[dD\]\[0-9\]+\\\[\[0-9\]+\\\])), \\\[\[rR\]\[0-9\]+\(:\[0-9\]+\)?\\\]!?\(\[ \]+@\[a-zA-Z0-9 \]+\)?\n" } } */
/* { dg-final { cleanup-saved-temps } } */ /* { dg-final { cleanup-saved-temps } } */
gcc/testsuite/gcc.target/arm/neon/vld1_lanes64.c
...@@ -16,5 +16,5 @@ void test_vld1_lanes64 (void) ...@@ -16,5 +16,5 @@ void test_vld1_lanes64 (void)
out_int64x1_t = vld1_lane_s64 (0, arg1_int64x1_t, 0); out_int64x1_t = vld1_lane_s64 (0, arg1_int64x1_t, 0);
} }
/* { dg-final { scan-assembler "vld1\.64\[ \]+((\\\{\[dD\]\[0-9\]+\\\})|(\[dD\]\[0-9\]+)), \\\[\[rR\]\[0-9\]+\\\]!?\(\[ \]+@\[a-zA-Z0-9 \]+\)?\n" } } */ /* { dg-final { scan-assembler "vld1\.64\[ \]+((\\\{\[dD\]\[0-9\]+\\\})|(\[dD\]\[0-9\]+)), \\\[\[rR\]\[0-9\]+\(:\[0-9\]+\)?\\\]!?\(\[ \]+@\[a-zA-Z0-9 \]+\)?\n" } } */
/* { dg-final { cleanup-saved-temps } } */ /* { dg-final { cleanup-saved-temps } } */
gcc/testsuite/gcc.target/arm/neon/vld1_lanes8.c
...@@ -16,5 +16,5 @@ void test_vld1_lanes8 (void) ...@@ -16,5 +16,5 @@ void test_vld1_lanes8 (void)
out_int8x8_t = vld1_lane_s8 (0, arg1_int8x8_t, 1); out_int8x8_t = vld1_lane_s8 (0, arg1_int8x8_t, 1);
} }
/* { dg-final { scan-assembler "vld1\.8\[ \]+((\\\{\[dD\]\[0-9\]+\\\[\[0-9\]+\\\]\\\})|(\[dD\]\[0-9\]+\\\[\[0-9\]+\\\])), \\\[\[rR\]\[0-9\]+\\\]!?\(\[ \]+@\[a-zA-Z0-9 \]+\)?\n" } } */ /* { dg-final { scan-assembler "vld1\.8\[ \]+((\\\{\[dD\]\[0-9\]+\\\[\[0-9\]+\\\]\\\})|(\[dD\]\[0-9\]+\\\[\[0-9\]+\\\])), \\\[\[rR\]\[0-9\]+\(:\[0-9\]+\)?\\\]!?\(\[ \]+@\[a-zA-Z0-9 \]+\)?\n" } } */
/* { dg-final { cleanup-saved-temps } } */ /* { dg-final { cleanup-saved-temps } } */
gcc/testsuite/gcc.target/arm/neon/vld1_laneu16.c
...@@ -16,5 +16,5 @@ void test_vld1_laneu16 (void) ...@@ -16,5 +16,5 @@ void test_vld1_laneu16 (void)
out_uint16x4_t = vld1_lane_u16 (0, arg1_uint16x4_t, 1); out_uint16x4_t = vld1_lane_u16 (0, arg1_uint16x4_t, 1);
} }
/* { dg-final { scan-assembler "vld1\.16\[ \]+((\\\{\[dD\]\[0-9\]+\\\[\[0-9\]+\\\]\\\})|(\[dD\]\[0-9\]+\\\[\[0-9\]+\\\])), \\\[\[rR\]\[0-9\]+\\\]!?\(\[ \]+@\[a-zA-Z0-9 \]+\)?\n" } } */ /* { dg-final { scan-assembler "vld1\.16\[ \]+((\\\{\[dD\]\[0-9\]+\\\[\[0-9\]+\\\]\\\})|(\[dD\]\[0-9\]+\\\[\[0-9\]+\\\])), \\\[\[rR\]\[0-9\]+\(:\[0-9\]+\)?\\\]!?\(\[ \]+@\[a-zA-Z0-9 \]+\)?\n" } } */
/* { dg-final { cleanup-saved-temps } } */ /* { dg-final { cleanup-saved-temps } } */
gcc/testsuite/gcc.target/arm/neon/vld1_laneu32.c
...@@ -16,5 +16,5 @@ void test_vld1_laneu32 (void) ...@@ -16,5 +16,5 @@ void test_vld1_laneu32 (void)
out_uint32x2_t = vld1_lane_u32 (0, arg1_uint32x2_t, 1); out_uint32x2_t = vld1_lane_u32 (0, arg1_uint32x2_t, 1);
} }
/* { dg-final { scan-assembler "vld1\.32\[ \]+((\\\{\[dD\]\[0-9\]+\\\[\[0-9\]+\\\]\\\})|(\[dD\]\[0-9\]+\\\[\[0-9\]+\\\])), \\\[\[rR\]\[0-9\]+\\\]!?\(\[ \]+@\[a-zA-Z0-9 \]+\)?\n" } } */ /* { dg-final { scan-assembler "vld1\.32\[ \]+((\\\{\[dD\]\[0-9\]+\\\[\[0-9\]+\\\]\\\})|(\[dD\]\[0-9\]+\\\[\[0-9\]+\\\])), \\\[\[rR\]\[0-9\]+\(:\[0-9\]+\)?\\\]!?\(\[ \]+@\[a-zA-Z0-9 \]+\)?\n" } } */
/* { dg-final { cleanup-saved-temps } } */ /* { dg-final { cleanup-saved-temps } } */
gcc/testsuite/gcc.target/arm/neon/vld1_laneu64.c
...@@ -16,5 +16,5 @@ void test_vld1_laneu64 (void) ...@@ -16,5 +16,5 @@ void test_vld1_laneu64 (void)
out_uint64x1_t = vld1_lane_u64 (0, arg1_uint64x1_t, 0); out_uint64x1_t = vld1_lane_u64 (0, arg1_uint64x1_t, 0);
} }
/* { dg-final { scan-assembler "vld1\.64\[ \]+((\\\{\[dD\]\[0-9\]+\\\})|(\[dD\]\[0-9\]+)), \\\[\[rR\]\[0-9\]+\\\]!?\(\[ \]+@\[a-zA-Z0-9 \]+\)?\n" } } */ /* { dg-final { scan-assembler "vld1\.64\[ \]+((\\\{\[dD\]\[0-9\]+\\\})|(\[dD\]\[0-9\]+)), \\\[\[rR\]\[0-9\]+\(:\[0-9\]+\)?\\\]!?\(\[ \]+@\[a-zA-Z0-9 \]+\)?\n" } } */
/* { dg-final { cleanup-saved-temps } } */ /* { dg-final { cleanup-saved-temps } } */
gcc/testsuite/gcc.target/arm/neon/vld1_laneu8.c
...@@ -16,5 +16,5 @@ void test_vld1_laneu8 (void) ...@@ -16,5 +16,5 @@ void test_vld1_laneu8 (void)
out_uint8x8_t = vld1_lane_u8 (0, arg1_uint8x8_t, 1); out_uint8x8_t = vld1_lane_u8 (0, arg1_uint8x8_t, 1);
} }
/* { dg-final { scan-assembler "vld1\.8\[ \]+((\\\{\[dD\]\[0-9\]+\\\[\[0-9\]+\\\]\\\})|(\[dD\]\[0-9\]+\\\[\[0-9\]+\\\])), \\\[\[rR\]\[0-9\]+\\\]!?\(\[ \]+@\[a-zA-Z0-9 \]+\)?\n" } } */ /* { dg-final { scan-assembler "vld1\.8\[ \]+((\\\{\[dD\]\[0-9\]+\\\[\[0-9\]+\\\]\\\})|(\[dD\]\[0-9\]+\\\[\[0-9\]+\\\])), \\\[\[rR\]\[0-9\]+\(:\[0-9\]+\)?\\\]!?\(\[ \]+@\[a-zA-Z0-9 \]+\)?\n" } } */
/* { dg-final { cleanup-saved-temps } } */ /* { dg-final { cleanup-saved-temps } } */
gcc/testsuite/gcc.target/arm/neon/vld1f32.c
...@@ -15,5 +15,5 @@ void test_vld1f32 (void) ...@@ -15,5 +15,5 @@ void test_vld1f32 (void)
out_float32x2_t = vld1_f32 (0); out_float32x2_t = vld1_f32 (0);
} }
/* { dg-final { scan-assembler "vld1\.32\[ \]+((\\\{\[dD\]\[0-9\]+\\\})|(\[dD\]\[0-9\]+)), \\\[\[rR\]\[0-9\]+\\\]!?\(\[ \]+@\[a-zA-Z0-9 \]+\)?\n" } } */ /* { dg-final { scan-assembler "vld1\.32\[ \]+((\\\{\[dD\]\[0-9\]+\\\})|(\[dD\]\[0-9\]+)), \\\[\[rR\]\[0-9\]+\(:\[0-9\]+\)?\\\]!?\(\[ \]+@\[a-zA-Z0-9 \]+\)?\n" } } */
/* { dg-final { cleanup-saved-temps } } */ /* { dg-final { cleanup-saved-temps } } */
gcc/testsuite/gcc.target/arm/neon/vld1p16.c
...@@ -15,5 +15,5 @@ void test_vld1p16 (void) ...@@ -15,5 +15,5 @@ void test_vld1p16 (void)
out_poly16x4_t = vld1_p16 (0); out_poly16x4_t = vld1_p16 (0);
} }
/* { dg-final { scan-assembler "vld1\.16\[ \]+((\\\{\[dD\]\[0-9\]+\\\})|(\[dD\]\[0-9\]+)), \\\[\[rR\]\[0-9\]+\\\]!?\(\[ \]+@\[a-zA-Z0-9 \]+\)?\n" } } */ /* { dg-final { scan-assembler "vld1\.16\[ \]+((\\\{\[dD\]\[0-9\]+\\\})|(\[dD\]\[0-9\]+)), \\\[\[rR\]\[0-9\]+\(:\[0-9\]+\)?\\\]!?\(\[ \]+@\[a-zA-Z0-9 \]+\)?\n" } } */
/* { dg-final { cleanup-saved-temps } } */ /* { dg-final { cleanup-saved-temps } } */
gcc/testsuite/gcc.target/arm/neon/vld1p8.c
...@@ -15,5 +15,5 @@ void test_vld1p8 (void) ...@@ -15,5 +15,5 @@ void test_vld1p8 (void)
out_poly8x8_t = vld1_p8 (0); out_poly8x8_t = vld1_p8 (0);
} }
/* { dg-final { scan-assembler "vld1\.8\[ \]+((\\\{\[dD\]\[0-9\]+\\\})|(\[dD\]\[0-9\]+)), \\\[\[rR\]\[0-9\]+\\\]!?\(\[ \]+@\[a-zA-Z0-9 \]+\)?\n" } } */ /* { dg-final { scan-assembler "vld1\.8\[ \]+((\\\{\[dD\]\[0-9\]+\\\})|(\[dD\]\[0-9\]+)), \\\[\[rR\]\[0-9\]+\(:\[0-9\]+\)?\\\]!?\(\[ \]+@\[a-zA-Z0-9 \]+\)?\n" } } */
/* { dg-final { cleanup-saved-temps } } */ /* { dg-final { cleanup-saved-temps } } */
gcc/testsuite/gcc.target/arm/neon/vld1s16.c
...@@ -15,5 +15,5 @@ void test_vld1s16 (void) ...@@ -15,5 +15,5 @@ void test_vld1s16 (void)
out_int16x4_t = vld1_s16 (0); out_int16x4_t = vld1_s16 (0);
} }
/* { dg-final { scan-assembler "vld1\.16\[ \]+((\\\{\[dD\]\[0-9\]+\\\})|(\[dD\]\[0-9\]+)), \\\[\[rR\]\[0-9\]+\\\]!?\(\[ \]+@\[a-zA-Z0-9 \]+\)?\n" } } */ /* { dg-final { scan-assembler "vld1\.16\[ \]+((\\\{\[dD\]\[0-9\]+\\\})|(\[dD\]\[0-9\]+)), \\\[\[rR\]\[0-9\]+\(:\[0-9\]+\)?\\\]!?\(\[ \]+@\[a-zA-Z0-9 \]+\)?\n" } } */
/* { dg-final { cleanup-saved-temps } } */ /* { dg-final { cleanup-saved-temps } } */
gcc/testsuite/gcc.target/arm/neon/vld1s32.c
...@@ -15,5 +15,5 @@ void test_vld1s32 (void) ...@@ -15,5 +15,5 @@ void test_vld1s32 (void)
out_int32x2_t = vld1_s32 (0); out_int32x2_t = vld1_s32 (0);
} }
/* { dg-final { scan-assembler "vld1\.32\[ \]+((\\\{\[dD\]\[0-9\]+\\\})|(\[dD\]\[0-9\]+)), \\\[\[rR\]\[0-9\]+\\\]!?\(\[ \]+@\[a-zA-Z0-9 \]+\)?\n" } } */ /* { dg-final { scan-assembler "vld1\.32\[ \]+((\\\{\[dD\]\[0-9\]+\\\})|(\[dD\]\[0-9\]+)), \\\[\[rR\]\[0-9\]+\(:\[0-9\]+\)?\\\]!?\(\[ \]+@\[a-zA-Z0-9 \]+\)?\n" } } */
/* { dg-final { cleanup-saved-temps } } */ /* { dg-final { cleanup-saved-temps } } */
gcc/testsuite/gcc.target/arm/neon/vld1s64.c
...@@ -15,5 +15,5 @@ void test_vld1s64 (void) ...@@ -15,5 +15,5 @@ void test_vld1s64 (void)
out_int64x1_t = vld1_s64 (0); out_int64x1_t = vld1_s64 (0);
} }
/* { dg-final { scan-assembler "vld1\.64\[ \]+((\\\{\[dD\]\[0-9\]+\\\})|(\[dD\]\[0-9\]+)), \\\[\[rR\]\[0-9\]+\\\]!?\(\[ \]+@\[a-zA-Z0-9 \]+\)?\n" } } */ /* { dg-final { scan-assembler "vld1\.64\[ \]+((\\\{\[dD\]\[0-9\]+\\\})|(\[dD\]\[0-9\]+)), \\\[\[rR\]\[0-9\]+\(:\[0-9\]+\)?\\\]!?\(\[ \]+@\[a-zA-Z0-9 \]+\)?\n" } } */
/* { dg-final { cleanup-saved-temps } } */ /* { dg-final { cleanup-saved-temps } } */
gcc/testsuite/gcc.target/arm/neon/vld1s8.c
...@@ -15,5 +15,5 @@ void test_vld1s8 (void) ...@@ -15,5 +15,5 @@ void test_vld1s8 (void)
out_int8x8_t = vld1_s8 (0); out_int8x8_t = vld1_s8 (0);
} }
/* { dg-final { scan-assembler "vld1\.8\[ \]+((\\\{\[dD\]\[0-9\]+\\\})|(\[dD\]\[0-9\]+)), \\\[\[rR\]\[0-9\]+\\\]!?\(\[ \]+@\[a-zA-Z0-9 \]+\)?\n" } } */ /* { dg-final { scan-assembler "vld1\.8\[ \]+((\\\{\[dD\]\[0-9\]+\\\})|(\[dD\]\[0-9\]+)), \\\[\[rR\]\[0-9\]+\(:\[0-9\]+\)?\\\]!?\(\[ \]+@\[a-zA-Z0-9 \]+\)?\n" } } */
/* { dg-final { cleanup-saved-temps } } */ /* { dg-final { cleanup-saved-temps } } */
gcc/testsuite/gcc.target/arm/neon/vld1u16.c
...@@ -15,5 +15,5 @@ void test_vld1u16 (void) ...@@ -15,5 +15,5 @@ void test_vld1u16 (void)
out_uint16x4_t = vld1_u16 (0); out_uint16x4_t = vld1_u16 (0);
} }
/* { dg-final { scan-assembler "vld1\.16\[ \]+((\\\{\[dD\]\[0-9\]+\\\})|(\[dD\]\[0-9\]+)), \\\[\[rR\]\[0-9\]+\\\]!?\(\[ \]+@\[a-zA-Z0-9 \]+\)?\n" } } */ /* { dg-final { scan-assembler "vld1\.16\[ \]+((\\\{\[dD\]\[0-9\]+\\\})|(\[dD\]\[0-9\]+)), \\\[\[rR\]\[0-9\]+\(:\[0-9\]+\)?\\\]!?\(\[ \]+@\[a-zA-Z0-9 \]+\)?\n" } } */
/* { dg-final { cleanup-saved-temps } } */ /* { dg-final { cleanup-saved-temps } } */
gcc/testsuite/gcc.target/arm/neon/vld1u32.c
...@@ -15,5 +15,5 @@ void test_vld1u32 (void) ...@@ -15,5 +15,5 @@ void test_vld1u32 (void)
out_uint32x2_t = vld1_u32 (0); out_uint32x2_t = vld1_u32 (0);
} }
/* { dg-final { scan-assembler "vld1\.32\[ \]+((\\\{\[dD\]\[0-9\]+\\\})|(\[dD\]\[0-9\]+)), \\\[\[rR\]\[0-9\]+\\\]!?\(\[ \]+@\[a-zA-Z0-9 \]+\)?\n" } } */ /* { dg-final { scan-assembler "vld1\.32\[ \]+((\\\{\[dD\]\[0-9\]+\\\})|(\[dD\]\[0-9\]+)), \\\[\[rR\]\[0-9\]+\(:\[0-9\]+\)?\\\]!?\(\[ \]+@\[a-zA-Z0-9 \]+\)?\n" } } */
/* { dg-final { cleanup-saved-temps } } */ /* { dg-final { cleanup-saved-temps } } */
gcc/testsuite/gcc.target/arm/neon/vld1u64.c
...@@ -15,5 +15,5 @@ void test_vld1u64 (void) ...@@ -15,5 +15,5 @@ void test_vld1u64 (void)
out_uint64x1_t = vld1_u64 (0); out_uint64x1_t = vld1_u64 (0);
} }
/* { dg-final { scan-assembler "vld1\.64\[ \]+((\\\{\[dD\]\[0-9\]+\\\})|(\[dD\]\[0-9\]+)), \\\[\[rR\]\[0-9\]+\\\]!?\(\[ \]+@\[a-zA-Z0-9 \]+\)?\n" } } */ /* { dg-final { scan-assembler "vld1\.64\[ \]+((\\\{\[dD\]\[0-9\]+\\\})|(\[dD\]\[0-9\]+)), \\\[\[rR\]\[0-9\]+\(:\[0-9\]+\)?\\\]!?\(\[ \]+@\[a-zA-Z0-9 \]+\)?\n" } } */
/* { dg-final { cleanup-saved-temps } } */ /* { dg-final { cleanup-saved-temps } } */
gcc/testsuite/gcc.target/arm/neon/vld1u8.c
...@@ -15,5 +15,5 @@ void test_vld1u8 (void) ...@@ -15,5 +15,5 @@ void test_vld1u8 (void)
out_uint8x8_t = vld1_u8 (0); out_uint8x8_t = vld1_u8 (0);
} }
/* { dg-final { scan-assembler "vld1\.8\[ \]+((\\\{\[dD\]\[0-9\]+\\\})|(\[dD\]\[0-9\]+)), \\\[\[rR\]\[0-9\]+\\\]!?\(\[ \]+@\[a-zA-Z0-9 \]+\)?\n" } } */ /* { dg-final { scan-assembler "vld1\.8\[ \]+((\\\{\[dD\]\[0-9\]+\\\})|(\[dD\]\[0-9\]+)), \\\[\[rR\]\[0-9\]+\(:\[0-9\]+\)?\\\]!?\(\[ \]+@\[a-zA-Z0-9 \]+\)?\n" } } */
/* { dg-final { cleanup-saved-temps } } */ /* { dg-final { cleanup-saved-temps } } */
gcc/testsuite/gcc.target/arm/neon/vld2Q_lanef32.c
...@@ -16,5 +16,5 @@ void test_vld2Q_lanef32 (void) ...@@ -16,5 +16,5 @@ void test_vld2Q_lanef32 (void)
out_float32x4x2_t = vld2q_lane_f32 (0, arg1_float32x4x2_t, 1); out_float32x4x2_t = vld2q_lane_f32 (0, arg1_float32x4x2_t, 1);
} }
/* { dg-final { scan-assembler "vld2\.32\[ \]+\\\{((\[dD\]\[0-9\]+\\\[\[0-9\]+\\\]-\[dD\]\[0-9\]+\\\[\[0-9\]+\\\])|(\[dD\]\[0-9\]+\\\[\[0-9\]+\\\], \[dD\]\[0-9\]+\\\[\[0-9\]+\\\]))\\\}, \\\[\[rR\]\[0-9\]+\\\]!?\(\[ \]+@\[a-zA-Z0-9 \]+\)?\n" } } */ /* { dg-final { scan-assembler "vld2\.32\[ \]+\\\{((\[dD\]\[0-9\]+\\\[\[0-9\]+\\\]-\[dD\]\[0-9\]+\\\[\[0-9\]+\\\])|(\[dD\]\[0-9\]+\\\[\[0-9\]+\\\], \[dD\]\[0-9\]+\\\[\[0-9\]+\\\]))\\\}, \\\[\[rR\]\[0-9\]+\(:\[0-9\]+\)?\\\]!?\(\[ \]+@\[a-zA-Z0-9 \]+\)?\n" } } */
/* { dg-final { cleanup-saved-temps } } */ /* { dg-final { cleanup-saved-temps } } */
gcc/testsuite/gcc.target/arm/neon/vld2Q_lanep16.c
...@@ -16,5 +16,5 @@ void test_vld2Q_lanep16 (void) ...@@ -16,5 +16,5 @@ void test_vld2Q_lanep16 (void)
out_poly16x8x2_t = vld2q_lane_p16 (0, arg1_poly16x8x2_t, 1); out_poly16x8x2_t = vld2q_lane_p16 (0, arg1_poly16x8x2_t, 1);
} }
/* { dg-final { scan-assembler "vld2\.16\[ \]+\\\{((\[dD\]\[0-9\]+\\\[\[0-9\]+\\\]-\[dD\]\[0-9\]+\\\[\[0-9\]+\\\])|(\[dD\]\[0-9\]+\\\[\[0-9\]+\\\], \[dD\]\[0-9\]+\\\[\[0-9\]+\\\]))\\\}, \\\[\[rR\]\[0-9\]+\\\]!?\(\[ \]+@\[a-zA-Z0-9 \]+\)?\n" } } */ /* { dg-final { scan-assembler "vld2\.16\[ \]+\\\{((\[dD\]\[0-9\]+\\\[\[0-9\]+\\\]-\[dD\]\[0-9\]+\\\[\[0-9\]+\\\])|(\[dD\]\[0-9\]+\\\[\[0-9\]+\\\], \[dD\]\[0-9\]+\\\[\[0-9\]+\\\]))\\\}, \\\[\[rR\]\[0-9\]+\(:\[0-9\]+\)?\\\]!?\(\[ \]+@\[a-zA-Z0-9 \]+\)?\n" } } */
/* { dg-final { cleanup-saved-temps } } */ /* { dg-final { cleanup-saved-temps } } */
gcc/testsuite/gcc.target/arm/neon/vld2Q_lanes16.c
...@@ -16,5 +16,5 @@ void test_vld2Q_lanes16 (void) ...@@ -16,5 +16,5 @@ void test_vld2Q_lanes16 (void)
out_int16x8x2_t = vld2q_lane_s16 (0, arg1_int16x8x2_t, 1); out_int16x8x2_t = vld2q_lane_s16 (0, arg1_int16x8x2_t, 1);
} }
/* { dg-final { scan-assembler "vld2\.16\[ \]+\\\{((\[dD\]\[0-9\]+\\\[\[0-9\]+\\\]-\[dD\]\[0-9\]+\\\[\[0-9\]+\\\])|(\[dD\]\[0-9\]+\\\[\[0-9\]+\\\], \[dD\]\[0-9\]+\\\[\[0-9\]+\\\]))\\\}, \\\[\[rR\]\[0-9\]+\\\]!?\(\[ \]+@\[a-zA-Z0-9 \]+\)?\n" } } */ /* { dg-final { scan-assembler "vld2\.16\[ \]+\\\{((\[dD\]\[0-9\]+\\\[\[0-9\]+\\\]-\[dD\]\[0-9\]+\\\[\[0-9\]+\\\])|(\[dD\]\[0-9\]+\\\[\[0-9\]+\\\], \[dD\]\[0-9\]+\\\[\[0-9\]+\\\]))\\\}, \\\[\[rR\]\[0-9\]+\(:\[0-9\]+\)?\\\]!?\(\[ \]+@\[a-zA-Z0-9 \]+\)?\n" } } */
/* { dg-final { cleanup-saved-temps } } */ /* { dg-final { cleanup-saved-temps } } */
gcc/testsuite/gcc.target/arm/neon/vld2Q_lanes32.c
...@@ -16,5 +16,5 @@ void test_vld2Q_lanes32 (void) ...@@ -16,5 +16,5 @@ void test_vld2Q_lanes32 (void)
out_int32x4x2_t = vld2q_lane_s32 (0, arg1_int32x4x2_t, 1); out_int32x4x2_t = vld2q_lane_s32 (0, arg1_int32x4x2_t, 1);
} }
/* { dg-final { scan-assembler "vld2\.32\[ \]+\\\{((\[dD\]\[0-9\]+\\\[\[0-9\]+\\\]-\[dD\]\[0-9\]+\\\[\[0-9\]+\\\])|(\[dD\]\[0-9\]+\\\[\[0-9\]+\\\], \[dD\]\[0-9\]+\\\[\[0-9\]+\\\]))\\\}, \\\[\[rR\]\[0-9\]+\\\]!?\(\[ \]+@\[a-zA-Z0-9 \]+\)?\n" } } */ /* { dg-final { scan-assembler "vld2\.32\[ \]+\\\{((\[dD\]\[0-9\]+\\\[\[0-9\]+\\\]-\[dD\]\[0-9\]+\\\[\[0-9\]+\\\])|(\[dD\]\[0-9\]+\\\[\[0-9\]+\\\], \[dD\]\[0-9\]+\\\[\[0-9\]+\\\]))\\\}, \\\[\[rR\]\[0-9\]+\(:\[0-9\]+\)?\\\]!?\(\[ \]+@\[a-zA-Z0-9 \]+\)?\n" } } */
/* { dg-final { cleanup-saved-temps } } */ /* { dg-final { cleanup-saved-temps } } */
gcc/testsuite/gcc.target/arm/neon/vld2Q_laneu16.c
...@@ -16,5 +16,5 @@ void test_vld2Q_laneu16 (void) ...@@ -16,5 +16,5 @@ void test_vld2Q_laneu16 (void)
out_uint16x8x2_t = vld2q_lane_u16 (0, arg1_uint16x8x2_t, 1); out_uint16x8x2_t = vld2q_lane_u16 (0, arg1_uint16x8x2_t, 1);
} }
/* { dg-final { scan-assembler "vld2\.16\[ \]+\\\{((\[dD\]\[0-9\]+\\\[\[0-9\]+\\\]-\[dD\]\[0-9\]+\\\[\[0-9\]+\\\])|(\[dD\]\[0-9\]+\\\[\[0-9\]+\\\], \[dD\]\[0-9\]+\\\[\[0-9\]+\\\]))\\\}, \\\[\[rR\]\[0-9\]+\\\]!?\(\[ \]+@\[a-zA-Z0-9 \]+\)?\n" } } */ /* { dg-final { scan-assembler "vld2\.16\[ \]+\\\{((\[dD\]\[0-9\]+\\\[\[0-9\]+\\\]-\[dD\]\[0-9\]+\\\[\[0-9\]+\\\])|(\[dD\]\[0-9\]+\\\[\[0-9\]+\\\], \[dD\]\[0-9\]+\\\[\[0-9\]+\\\]))\\\}, \\\[\[rR\]\[0-9\]+\(:\[0-9\]+\)?\\\]!?\(\[ \]+@\[a-zA-Z0-9 \]+\)?\n" } } */
/* { dg-final { cleanup-saved-temps } } */ /* { dg-final { cleanup-saved-temps } } */
gcc/testsuite/gcc.target/arm/neon/vld2Q_laneu32.c
...@@ -16,5 +16,5 @@ void test_vld2Q_laneu32 (void) ...@@ -16,5 +16,5 @@ void test_vld2Q_laneu32 (void)
out_uint32x4x2_t = vld2q_lane_u32 (0, arg1_uint32x4x2_t, 1); out_uint32x4x2_t = vld2q_lane_u32 (0, arg1_uint32x4x2_t, 1);
} }
/* { dg-final { scan-assembler "vld2\.32\[ \]+\\\{((\[dD\]\[0-9\]+\\\[\[0-9\]+\\\]-\[dD\]\[0-9\]+\\\[\[0-9\]+\\\])|(\[dD\]\[0-9\]+\\\[\[0-9\]+\\\], \[dD\]\[0-9\]+\\\[\[0-9\]+\\\]))\\\}, \\\[\[rR\]\[0-9\]+\\\]!?\(\[ \]+@\[a-zA-Z0-9 \]+\)?\n" } } */ /* { dg-final { scan-assembler "vld2\.32\[ \]+\\\{((\[dD\]\[0-9\]+\\\[\[0-9\]+\\\]-\[dD\]\[0-9\]+\\\[\[0-9\]+\\\])|(\[dD\]\[0-9\]+\\\[\[0-9\]+\\\], \[dD\]\[0-9\]+\\\[\[0-9\]+\\\]))\\\}, \\\[\[rR\]\[0-9\]+\(:\[0-9\]+\)?\\\]!?\(\[ \]+@\[a-zA-Z0-9 \]+\)?\n" } } */
/* { dg-final { cleanup-saved-temps } } */ /* { dg-final { cleanup-saved-temps } } */
gcc/testsuite/gcc.target/arm/neon/vld2Qf32.c
...@@ -15,6 +15,6 @@ void test_vld2Qf32 (void) ...@@ -15,6 +15,6 @@ void test_vld2Qf32 (void)
out_float32x4x2_t = vld2q_f32 (0); out_float32x4x2_t = vld2q_f32 (0);
} }
/* { dg-final { scan-assembler "vld2\.32\[ \]+\\\{((\[dD\]\[0-9\]+-\[dD\]\[0-9\]+)|(\[dD\]\[0-9\]+, \[dD\]\[0-9\]+))\\\}, \\\[\[rR\]\[0-9\]+\\\]!?\(\[ \]+@\[a-zA-Z0-9 \]+\)?\n" } } */ /* { dg-final { scan-assembler "vld2\.32\[ \]+\\\{((\[dD\]\[0-9\]+-\[dD\]\[0-9\]+)|(\[dD\]\[0-9\]+, \[dD\]\[0-9\]+))\\\}, \\\[\[rR\]\[0-9\]+\(:\[0-9\]+\)?\\\]!?\(\[ \]+@\[a-zA-Z0-9 \]+\)?\n" } } */
/* { dg-final { scan-assembler "vld2\.32\[ \]+\\\{((\[dD\]\[0-9\]+-\[dD\]\[0-9\]+)|(\[dD\]\[0-9\]+, \[dD\]\[0-9\]+))\\\}, \\\[\[rR\]\[0-9\]+\\\]!?\(\[ \]+@\[a-zA-Z0-9 \]+\)?\n" } } */ /* { dg-final { scan-assembler "vld2\.32\[ \]+\\\{((\[dD\]\[0-9\]+-\[dD\]\[0-9\]+)|(\[dD\]\[0-9\]+, \[dD\]\[0-9\]+))\\\}, \\\[\[rR\]\[0-9\]+\(:\[0-9\]+\)?\\\]!?\(\[ \]+@\[a-zA-Z0-9 \]+\)?\n" } } */
/* { dg-final { cleanup-saved-temps } } */ /* { dg-final { cleanup-saved-temps } } */
gcc/testsuite/gcc.target/arm/neon/vld2Qp16.c
...@@ -15,6 +15,6 @@ void test_vld2Qp16 (void) ...@@ -15,6 +15,6 @@ void test_vld2Qp16 (void)
out_poly16x8x2_t = vld2q_p16 (0); out_poly16x8x2_t = vld2q_p16 (0);
} }
/* { dg-final { scan-assembler "vld2\.16\[ \]+\\\{((\[dD\]\[0-9\]+-\[dD\]\[0-9\]+)|(\[dD\]\[0-9\]+, \[dD\]\[0-9\]+))\\\}, \\\[\[rR\]\[0-9\]+\\\]!?\(\[ \]+@\[a-zA-Z0-9 \]+\)?\n" } } */ /* { dg-final { scan-assembler "vld2\.16\[ \]+\\\{((\[dD\]\[0-9\]+-\[dD\]\[0-9\]+)|(\[dD\]\[0-9\]+, \[dD\]\[0-9\]+))\\\}, \\\[\[rR\]\[0-9\]+\(:\[0-9\]+\)?\\\]!?\(\[ \]+@\[a-zA-Z0-9 \]+\)?\n" } } */
/* { dg-final { scan-assembler "vld2\.16\[ \]+\\\{((\[dD\]\[0-9\]+-\[dD\]\[0-9\]+)|(\[dD\]\[0-9\]+, \[dD\]\[0-9\]+))\\\}, \\\[\[rR\]\[0-9\]+\\\]!?\(\[ \]+@\[a-zA-Z0-9 \]+\)?\n" } } */ /* { dg-final { scan-assembler "vld2\.16\[ \]+\\\{((\[dD\]\[0-9\]+-\[dD\]\[0-9\]+)|(\[dD\]\[0-9\]+, \[dD\]\[0-9\]+))\\\}, \\\[\[rR\]\[0-9\]+\(:\[0-9\]+\)?\\\]!?\(\[ \]+@\[a-zA-Z0-9 \]+\)?\n" } } */
/* { dg-final { cleanup-saved-temps } } */ /* { dg-final { cleanup-saved-temps } } */
gcc/testsuite/gcc.target/arm/neon/vld2Qp8.c
...@@ -15,6 +15,6 @@ void test_vld2Qp8 (void) ...@@ -15,6 +15,6 @@ void test_vld2Qp8 (void)
out_poly8x16x2_t = vld2q_p8 (0); out_poly8x16x2_t = vld2q_p8 (0);
} }
/* { dg-final { scan-assembler "vld2\.8\[ \]+\\\{((\[dD\]\[0-9\]+-\[dD\]\[0-9\]+)|(\[dD\]\[0-9\]+, \[dD\]\[0-9\]+))\\\}, \\\[\[rR\]\[0-9\]+\\\]!?\(\[ \]+@\[a-zA-Z0-9 \]+\)?\n" } } */ /* { dg-final { scan-assembler "vld2\.8\[ \]+\\\{((\[dD\]\[0-9\]+-\[dD\]\[0-9\]+)|(\[dD\]\[0-9\]+, \[dD\]\[0-9\]+))\\\}, \\\[\[rR\]\[0-9\]+\(:\[0-9\]+\)?\\\]!?\(\[ \]+@\[a-zA-Z0-9 \]+\)?\n" } } */
/* { dg-final { scan-assembler "vld2\.8\[ \]+\\\{((\[dD\]\[0-9\]+-\[dD\]\[0-9\]+)|(\[dD\]\[0-9\]+, \[dD\]\[0-9\]+))\\\}, \\\[\[rR\]\[0-9\]+\\\]!?\(\[ \]+@\[a-zA-Z0-9 \]+\)?\n" } } */ /* { dg-final { scan-assembler "vld2\.8\[ \]+\\\{((\[dD\]\[0-9\]+-\[dD\]\[0-9\]+)|(\[dD\]\[0-9\]+, \[dD\]\[0-9\]+))\\\}, \\\[\[rR\]\[0-9\]+\(:\[0-9\]+\)?\\\]!?\(\[ \]+@\[a-zA-Z0-9 \]+\)?\n" } } */
/* { dg-final { cleanup-saved-temps } } */ /* { dg-final { cleanup-saved-temps } } */
gcc/testsuite/gcc.target/arm/neon/vld2Qs16.c
...@@ -15,6 +15,6 @@ void test_vld2Qs16 (void) ...@@ -15,6 +15,6 @@ void test_vld2Qs16 (void)
out_int16x8x2_t = vld2q_s16 (0); out_int16x8x2_t = vld2q_s16 (0);
} }
/* { dg-final { scan-assembler "vld2\.16\[ \]+\\\{((\[dD\]\[0-9\]+-\[dD\]\[0-9\]+)|(\[dD\]\[0-9\]+, \[dD\]\[0-9\]+))\\\}, \\\[\[rR\]\[0-9\]+\\\]!?\(\[ \]+@\[a-zA-Z0-9 \]+\)?\n" } } */ /* { dg-final { scan-assembler "vld2\.16\[ \]+\\\{((\[dD\]\[0-9\]+-\[dD\]\[0-9\]+)|(\[dD\]\[0-9\]+, \[dD\]\[0-9\]+))\\\}, \\\[\[rR\]\[0-9\]+\(:\[0-9\]+\)?\\\]!?\(\[ \]+@\[a-zA-Z0-9 \]+\)?\n" } } */
/* { dg-final { scan-assembler "vld2\.16\[ \]+\\\{((\[dD\]\[0-9\]+-\[dD\]\[0-9\]+)|(\[dD\]\[0-9\]+, \[dD\]\[0-9\]+))\\\}, \\\[\[rR\]\[0-9\]+\\\]!?\(\[ \]+@\[a-zA-Z0-9 \]+\)?\n" } } */ /* { dg-final { scan-assembler "vld2\.16\[ \]+\\\{((\[dD\]\[0-9\]+-\[dD\]\[0-9\]+)|(\[dD\]\[0-9\]+, \[dD\]\[0-9\]+))\\\}, \\\[\[rR\]\[0-9\]+\(:\[0-9\]+\)?\\\]!?\(\[ \]+@\[a-zA-Z0-9 \]+\)?\n" } } */
/* { dg-final { cleanup-saved-temps } } */ /* { dg-final { cleanup-saved-temps } } */
gcc/testsuite/gcc.target/arm/neon/vld2Qs32.c
...@@ -15,6 +15,6 @@ void test_vld2Qs32 (void) ...@@ -15,6 +15,6 @@ void test_vld2Qs32 (void)
out_int32x4x2_t = vld2q_s32 (0); out_int32x4x2_t = vld2q_s32 (0);
} }
/* { dg-final { scan-assembler "vld2\.32\[ \]+\\\{((\[dD\]\[0-9\]+-\[dD\]\[0-9\]+)|(\[dD\]\[0-9\]+, \[dD\]\[0-9\]+))\\\}, \\\[\[rR\]\[0-9\]+\\\]!?\(\[ \]+@\[a-zA-Z0-9 \]+\)?\n" } } */ /* { dg-final { scan-assembler "vld2\.32\[ \]+\\\{((\[dD\]\[0-9\]+-\[dD\]\[0-9\]+)|(\[dD\]\[0-9\]+, \[dD\]\[0-9\]+))\\\}, \\\[\[rR\]\[0-9\]+\(:\[0-9\]+\)?\\\]!?\(\[ \]+@\[a-zA-Z0-9 \]+\)?\n" } } */
/* { dg-final { scan-assembler "vld2\.32\[ \]+\\\{((\[dD\]\[0-9\]+-\[dD\]\[0-9\]+)|(\[dD\]\[0-9\]+, \[dD\]\[0-9\]+))\\\}, \\\[\[rR\]\[0-9\]+\\\]!?\(\[ \]+@\[a-zA-Z0-9 \]+\)?\n" } } */ /* { dg-final { scan-assembler "vld2\.32\[ \]+\\\{((\[dD\]\[0-9\]+-\[dD\]\[0-9\]+)|(\[dD\]\[0-9\]+, \[dD\]\[0-9\]+))\\\}, \\\[\[rR\]\[0-9\]+\(:\[0-9\]+\)?\\\]!?\(\[ \]+@\[a-zA-Z0-9 \]+\)?\n" } } */
/* { dg-final { cleanup-saved-temps } } */ /* { dg-final { cleanup-saved-temps } } */
gcc/testsuite/gcc.target/arm/neon/vld2Qs8.c
...@@ -15,6 +15,6 @@ void test_vld2Qs8 (void) ...@@ -15,6 +15,6 @@ void test_vld2Qs8 (void)
out_int8x16x2_t = vld2q_s8 (0); out_int8x16x2_t = vld2q_s8 (0);
} }
/* { dg-final { scan-assembler "vld2\.8\[ \]+\\\{((\[dD\]\[0-9\]+-\[dD\]\[0-9\]+)|(\[dD\]\[0-9\]+, \[dD\]\[0-9\]+))\\\}, \\\[\[rR\]\[0-9\]+\\\]!?\(\[ \]+@\[a-zA-Z0-9 \]+\)?\n" } } */ /* { dg-final { scan-assembler "vld2\.8\[ \]+\\\{((\[dD\]\[0-9\]+-\[dD\]\[0-9\]+)|(\[dD\]\[0-9\]+, \[dD\]\[0-9\]+))\\\}, \\\[\[rR\]\[0-9\]+\(:\[0-9\]+\)?\\\]!?\(\[ \]+@\[a-zA-Z0-9 \]+\)?\n" } } */
/* { dg-final { scan-assembler "vld2\.8\[ \]+\\\{((\[dD\]\[0-9\]+-\[dD\]\[0-9\]+)|(\[dD\]\[0-9\]+, \[dD\]\[0-9\]+))\\\}, \\\[\[rR\]\[0-9\]+\\\]!?\(\[ \]+@\[a-zA-Z0-9 \]+\)?\n" } } */ /* { dg-final { scan-assembler "vld2\.8\[ \]+\\\{((\[dD\]\[0-9\]+-\[dD\]\[0-9\]+)|(\[dD\]\[0-9\]+, \[dD\]\[0-9\]+))\\\}, \\\[\[rR\]\[0-9\]+\(:\[0-9\]+\)?\\\]!?\(\[ \]+@\[a-zA-Z0-9 \]+\)?\n" } } */
/* { dg-final { cleanup-saved-temps } } */ /* { dg-final { cleanup-saved-temps } } */
gcc/testsuite/gcc.target/arm/neon/vld2Qu16.c
...@@ -15,6 +15,6 @@ void test_vld2Qu16 (void) ...@@ -15,6 +15,6 @@ void test_vld2Qu16 (void)
out_uint16x8x2_t = vld2q_u16 (0); out_uint16x8x2_t = vld2q_u16 (0);
} }
/* { dg-final { scan-assembler "vld2\.16\[ \]+\\\{((\[dD\]\[0-9\]+-\[dD\]\[0-9\]+)|(\[dD\]\[0-9\]+, \[dD\]\[0-9\]+))\\\}, \\\[\[rR\]\[0-9\]+\\\]!?\(\[ \]+@\[a-zA-Z0-9 \]+\)?\n" } } */ /* { dg-final { scan-assembler "vld2\.16\[ \]+\\\{((\[dD\]\[0-9\]+-\[dD\]\[0-9\]+)|(\[dD\]\[0-9\]+, \[dD\]\[0-9\]+))\\\}, \\\[\[rR\]\[0-9\]+\(:\[0-9\]+\)?\\\]!?\(\[ \]+@\[a-zA-Z0-9 \]+\)?\n" } } */
/* { dg-final { scan-assembler "vld2\.16\[ \]+\\\{((\[dD\]\[0-9\]+-\[dD\]\[0-9\]+)|(\[dD\]\[0-9\]+, \[dD\]\[0-9\]+))\\\}, \\\[\[rR\]\[0-9\]+\\\]!?\(\[ \]+@\[a-zA-Z0-9 \]+\)?\n" } } */ /* { dg-final { scan-assembler "vld2\.16\[ \]+\\\{((\[dD\]\[0-9\]+-\[dD\]\[0-9\]+)|(\[dD\]\[0-9\]+, \[dD\]\[0-9\]+))\\\}, \\\[\[rR\]\[0-9\]+\(:\[0-9\]+\)?\\\]!?\(\[ \]+@\[a-zA-Z0-9 \]+\)?\n" } } */
/* { dg-final { cleanup-saved-temps } } */ /* { dg-final { cleanup-saved-temps } } */
gcc/testsuite/gcc.target/arm/neon/vld2Qu32.c
...@@ -15,6 +15,6 @@ void test_vld2Qu32 (void) ...@@ -15,6 +15,6 @@ void test_vld2Qu32 (void)
out_uint32x4x2_t = vld2q_u32 (0); out_uint32x4x2_t = vld2q_u32 (0);
} }
/* { dg-final { scan-assembler "vld2\.32\[ \]+\\\{((\[dD\]\[0-9\]+-\[dD\]\[0-9\]+)|(\[dD\]\[0-9\]+, \[dD\]\[0-9\]+))\\\}, \\\[\[rR\]\[0-9\]+\\\]!?\(\[ \]+@\[a-zA-Z0-9 \]+\)?\n" } } */ /* { dg-final { scan-assembler "vld2\.32\[ \]+\\\{((\[dD\]\[0-9\]+-\[dD\]\[0-9\]+)|(\[dD\]\[0-9\]+, \[dD\]\[0-9\]+))\\\}, \\\[\[rR\]\[0-9\]+\(:\[0-9\]+\)?\\\]!?\(\[ \]+@\[a-zA-Z0-9 \]+\)?\n" } } */
/* { dg-final { scan-assembler "vld2\.32\[ \]+\\\{((\[dD\]\[0-9\]+-\[dD\]\[0-9\]+)|(\[dD\]\[0-9\]+, \[dD\]\[0-9\]+))\\\}, \\\[\[rR\]\[0-9\]+\\\]!?\(\[ \]+@\[a-zA-Z0-9 \]+\)?\n" } } */ /* { dg-final { scan-assembler "vld2\.32\[ \]+\\\{((\[dD\]\[0-9\]+-\[dD\]\[0-9\]+)|(\[dD\]\[0-9\]+, \[dD\]\[0-9\]+))\\\}, \\\[\[rR\]\[0-9\]+\(:\[0-9\]+\)?\\\]!?\(\[ \]+@\[a-zA-Z0-9 \]+\)?\n" } } */
/* { dg-final { cleanup-saved-temps } } */ /* { dg-final { cleanup-saved-temps } } */
gcc/testsuite/gcc.target/arm/neon/vld2Qu8.c
...@@ -15,6 +15,6 @@ void test_vld2Qu8 (void) ...@@ -15,6 +15,6 @@ void test_vld2Qu8 (void)
out_uint8x16x2_t = vld2q_u8 (0); out_uint8x16x2_t = vld2q_u8 (0);
} }
/* { dg-final { scan-assembler "vld2\.8\[ \]+\\\{((\[dD\]\[0-9\]+-\[dD\]\[0-9\]+)|(\[dD\]\[0-9\]+, \[dD\]\[0-9\]+))\\\}, \\\[\[rR\]\[0-9\]+\\\]!?\(\[ \]+@\[a-zA-Z0-9 \]+\)?\n" } } */ /* { dg-final { scan-assembler "vld2\.8\[ \]+\\\{((\[dD\]\[0-9\]+-\[dD\]\[0-9\]+)|(\[dD\]\[0-9\]+, \[dD\]\[0-9\]+))\\\}, \\\[\[rR\]\[0-9\]+\(:\[0-9\]+\)?\\\]!?\(\[ \]+@\[a-zA-Z0-9 \]+\)?\n" } } */
/* { dg-final { scan-assembler "vld2\.8\[ \]+\\\{((\[dD\]\[0-9\]+-\[dD\]\[0-9\]+)|(\[dD\]\[0-9\]+, \[dD\]\[0-9\]+))\\\}, \\\[\[rR\]\[0-9\]+\\\]!?\(\[ \]+@\[a-zA-Z0-9 \]+\)?\n" } } */ /* { dg-final { scan-assembler "vld2\.8\[ \]+\\\{((\[dD\]\[0-9\]+-\[dD\]\[0-9\]+)|(\[dD\]\[0-9\]+, \[dD\]\[0-9\]+))\\\}, \\\[\[rR\]\[0-9\]+\(:\[0-9\]+\)?\\\]!?\(\[ \]+@\[a-zA-Z0-9 \]+\)?\n" } } */
/* { dg-final { cleanup-saved-temps } } */ /* { dg-final { cleanup-saved-temps } } */
gcc/testsuite/gcc.target/arm/neon/vld2_dupf32.c
...@@ -15,5 +15,5 @@ void test_vld2_dupf32 (void) ...@@ -15,5 +15,5 @@ void test_vld2_dupf32 (void)
out_float32x2x2_t = vld2_dup_f32 (0); out_float32x2x2_t = vld2_dup_f32 (0);
} }
/* { dg-final { scan-assembler "vld2\.32\[ \]+\\\{((\[dD\]\[0-9\]+\\\[\\\]-\[dD\]\[0-9\]+\\\[\\\])|(\[dD\]\[0-9\]+\\\[\\\], \[dD\]\[0-9\]+\\\[\\\]))\\\}, \\\[\[rR\]\[0-9\]+\\\]!?\(\[ \]+@\[a-zA-Z0-9 \]+\)?\n" } } */ /* { dg-final { scan-assembler "vld2\.32\[ \]+\\\{((\[dD\]\[0-9\]+\\\[\\\]-\[dD\]\[0-9\]+\\\[\\\])|(\[dD\]\[0-9\]+\\\[\\\], \[dD\]\[0-9\]+\\\[\\\]))\\\}, \\\[\[rR\]\[0-9\]+\(:\[0-9\]+\)?\\\]!?\(\[ \]+@\[a-zA-Z0-9 \]+\)?\n" } } */
/* { dg-final { cleanup-saved-temps } } */ /* { dg-final { cleanup-saved-temps } } */
gcc/testsuite/gcc.target/arm/neon/vld2_dupp16.c
...@@ -15,5 +15,5 @@ void test_vld2_dupp16 (void) ...@@ -15,5 +15,5 @@ void test_vld2_dupp16 (void)
out_poly16x4x2_t = vld2_dup_p16 (0); out_poly16x4x2_t = vld2_dup_p16 (0);
} }
/* { dg-final { scan-assembler "vld2\.16\[ \]+\\\{((\[dD\]\[0-9\]+\\\[\\\]-\[dD\]\[0-9\]+\\\[\\\])|(\[dD\]\[0-9\]+\\\[\\\], \[dD\]\[0-9\]+\\\[\\\]))\\\}, \\\[\[rR\]\[0-9\]+\\\]!?\(\[ \]+@\[a-zA-Z0-9 \]+\)?\n" } } */ /* { dg-final { scan-assembler "vld2\.16\[ \]+\\\{((\[dD\]\[0-9\]+\\\[\\\]-\[dD\]\[0-9\]+\\\[\\\])|(\[dD\]\[0-9\]+\\\[\\\], \[dD\]\[0-9\]+\\\[\\\]))\\\}, \\\[\[rR\]\[0-9\]+\(:\[0-9\]+\)?\\\]!?\(\[ \]+@\[a-zA-Z0-9 \]+\)?\n" } } */
/* { dg-final { cleanup-saved-temps } } */ /* { dg-final { cleanup-saved-temps } } */
gcc/testsuite/gcc.target/arm/neon/vld2_dupp8.c
...@@ -15,5 +15,5 @@ void test_vld2_dupp8 (void) ...@@ -15,5 +15,5 @@ void test_vld2_dupp8 (void)
out_poly8x8x2_t = vld2_dup_p8 (0); out_poly8x8x2_t = vld2_dup_p8 (0);
} }
/* { dg-final { scan-assembler "vld2\.8\[ \]+\\\{((\[dD\]\[0-9\]+\\\[\\\]-\[dD\]\[0-9\]+\\\[\\\])|(\[dD\]\[0-9\]+\\\[\\\], \[dD\]\[0-9\]+\\\[\\\]))\\\}, \\\[\[rR\]\[0-9\]+\\\]!?\(\[ \]+@\[a-zA-Z0-9 \]+\)?\n" } } */ /* { dg-final { scan-assembler "vld2\.8\[ \]+\\\{((\[dD\]\[0-9\]+\\\[\\\]-\[dD\]\[0-9\]+\\\[\\\])|(\[dD\]\[0-9\]+\\\[\\\], \[dD\]\[0-9\]+\\\[\\\]))\\\}, \\\[\[rR\]\[0-9\]+\(:\[0-9\]+\)?\\\]!?\(\[ \]+@\[a-zA-Z0-9 \]+\)?\n" } } */
/* { dg-final { cleanup-saved-temps } } */ /* { dg-final { cleanup-saved-temps } } */
gcc/testsuite/gcc.target/arm/neon/vld2_dups16.c
...@@ -15,5 +15,5 @@ void test_vld2_dups16 (void) ...@@ -15,5 +15,5 @@ void test_vld2_dups16 (void)
out_int16x4x2_t = vld2_dup_s16 (0); out_int16x4x2_t = vld2_dup_s16 (0);
} }
/* { dg-final { scan-assembler "vld2\.16\[ \]+\\\{((\[dD\]\[0-9\]+\\\[\\\]-\[dD\]\[0-9\]+\\\[\\\])|(\[dD\]\[0-9\]+\\\[\\\], \[dD\]\[0-9\]+\\\[\\\]))\\\}, \\\[\[rR\]\[0-9\]+\\\]!?\(\[ \]+@\[a-zA-Z0-9 \]+\)?\n" } } */ /* { dg-final { scan-assembler "vld2\.16\[ \]+\\\{((\[dD\]\[0-9\]+\\\[\\\]-\[dD\]\[0-9\]+\\\[\\\])|(\[dD\]\[0-9\]+\\\[\\\], \[dD\]\[0-9\]+\\\[\\\]))\\\}, \\\[\[rR\]\[0-9\]+\(:\[0-9\]+\)?\\\]!?\(\[ \]+@\[a-zA-Z0-9 \]+\)?\n" } } */
/* { dg-final { cleanup-saved-temps } } */ /* { dg-final { cleanup-saved-temps } } */
gcc/testsuite/gcc.target/arm/neon/vld2_dups32.c
...@@ -15,5 +15,5 @@ void test_vld2_dups32 (void) ...@@ -15,5 +15,5 @@ void test_vld2_dups32 (void)
out_int32x2x2_t = vld2_dup_s32 (0); out_int32x2x2_t = vld2_dup_s32 (0);
} }
/* { dg-final { scan-assembler "vld2\.32\[ \]+\\\{((\[dD\]\[0-9\]+\\\[\\\]-\[dD\]\[0-9\]+\\\[\\\])|(\[dD\]\[0-9\]+\\\[\\\], \[dD\]\[0-9\]+\\\[\\\]))\\\}, \\\[\[rR\]\[0-9\]+\\\]!?\(\[ \]+@\[a-zA-Z0-9 \]+\)?\n" } } */ /* { dg-final { scan-assembler "vld2\.32\[ \]+\\\{((\[dD\]\[0-9\]+\\\[\\\]-\[dD\]\[0-9\]+\\\[\\\])|(\[dD\]\[0-9\]+\\\[\\\], \[dD\]\[0-9\]+\\\[\\\]))\\\}, \\\[\[rR\]\[0-9\]+\(:\[0-9\]+\)?\\\]!?\(\[ \]+@\[a-zA-Z0-9 \]+\)?\n" } } */
/* { dg-final { cleanup-saved-temps } } */ /* { dg-final { cleanup-saved-temps } } */
gcc/testsuite/gcc.target/arm/neon/vld2_dups64.c
...@@ -15,5 +15,5 @@ void test_vld2_dups64 (void) ...@@ -15,5 +15,5 @@ void test_vld2_dups64 (void)
out_int64x1x2_t = vld2_dup_s64 (0); out_int64x1x2_t = vld2_dup_s64 (0);
} }
/* { dg-final { scan-assembler "vld1\.64\[ \]+\\\{((\[dD\]\[0-9\]+-\[dD\]\[0-9\]+)|(\[dD\]\[0-9\]+, \[dD\]\[0-9\]+))\\\}, \\\[\[rR\]\[0-9\]+\\\]!?\(\[ \]+@\[a-zA-Z0-9 \]+\)?\n" } } */ /* { dg-final { scan-assembler "vld1\.64\[ \]+\\\{((\[dD\]\[0-9\]+-\[dD\]\[0-9\]+)|(\[dD\]\[0-9\]+, \[dD\]\[0-9\]+))\\\}, \\\[\[rR\]\[0-9\]+\(:\[0-9\]+\)?\\\]!?\(\[ \]+@\[a-zA-Z0-9 \]+\)?\n" } } */
/* { dg-final { cleanup-saved-temps } } */ /* { dg-final { cleanup-saved-temps } } */
gcc/testsuite/gcc.target/arm/neon/vld2_dups8.c
...@@ -15,5 +15,5 @@ void test_vld2_dups8 (void) ...@@ -15,5 +15,5 @@ void test_vld2_dups8 (void)
out_int8x8x2_t = vld2_dup_s8 (0); out_int8x8x2_t = vld2_dup_s8 (0);
} }
/* { dg-final { scan-assembler "vld2\.8\[ \]+\\\{((\[dD\]\[0-9\]+\\\[\\\]-\[dD\]\[0-9\]+\\\[\\\])|(\[dD\]\[0-9\]+\\\[\\\], \[dD\]\[0-9\]+\\\[\\\]))\\\}, \\\[\[rR\]\[0-9\]+\\\]!?\(\[ \]+@\[a-zA-Z0-9 \]+\)?\n" } } */ /* { dg-final { scan-assembler "vld2\.8\[ \]+\\\{((\[dD\]\[0-9\]+\\\[\\\]-\[dD\]\[0-9\]+\\\[\\\])|(\[dD\]\[0-9\]+\\\[\\\], \[dD\]\[0-9\]+\\\[\\\]))\\\}, \\\[\[rR\]\[0-9\]+\(:\[0-9\]+\)?\\\]!?\(\[ \]+@\[a-zA-Z0-9 \]+\)?\n" } } */
/* { dg-final { cleanup-saved-temps } } */ /* { dg-final { cleanup-saved-temps } } */
gcc/testsuite/gcc.target/arm/neon/vld2_dupu16.c
...@@ -15,5 +15,5 @@ void test_vld2_dupu16 (void) ...@@ -15,5 +15,5 @@ void test_vld2_dupu16 (void)
out_uint16x4x2_t = vld2_dup_u16 (0); out_uint16x4x2_t = vld2_dup_u16 (0);
} }
/* { dg-final { scan-assembler "vld2\.16\[ \]+\\\{((\[dD\]\[0-9\]+\\\[\\\]-\[dD\]\[0-9\]+\\\[\\\])|(\[dD\]\[0-9\]+\\\[\\\], \[dD\]\[0-9\]+\\\[\\\]))\\\}, \\\[\[rR\]\[0-9\]+\\\]!?\(\[ \]+@\[a-zA-Z0-9 \]+\)?\n" } } */ /* { dg-final { scan-assembler "vld2\.16\[ \]+\\\{((\[dD\]\[0-9\]+\\\[\\\]-\[dD\]\[0-9\]+\\\[\\\])|(\[dD\]\[0-9\]+\\\[\\\], \[dD\]\[0-9\]+\\\[\\\]))\\\}, \\\[\[rR\]\[0-9\]+\(:\[0-9\]+\)?\\\]!?\(\[ \]+@\[a-zA-Z0-9 \]+\)?\n" } } */
/* { dg-final { cleanup-saved-temps } } */ /* { dg-final { cleanup-saved-temps } } */
gcc/testsuite/gcc.target/arm/neon/vld2_dupu32.c
...@@ -15,5 +15,5 @@ void test_vld2_dupu32 (void) ...@@ -15,5 +15,5 @@ void test_vld2_dupu32 (void)
out_uint32x2x2_t = vld2_dup_u32 (0); out_uint32x2x2_t = vld2_dup_u32 (0);
} }
/* { dg-final { scan-assembler "vld2\.32\[ \]+\\\{((\[dD\]\[0-9\]+\\\[\\\]-\[dD\]\[0-9\]+\\\[\\\])|(\[dD\]\[0-9\]+\\\[\\\], \[dD\]\[0-9\]+\\\[\\\]))\\\}, \\\[\[rR\]\[0-9\]+\\\]!?\(\[ \]+@\[a-zA-Z0-9 \]+\)?\n" } } */ /* { dg-final { scan-assembler "vld2\.32\[ \]+\\\{((\[dD\]\[0-9\]+\\\[\\\]-\[dD\]\[0-9\]+\\\[\\\])|(\[dD\]\[0-9\]+\\\[\\\], \[dD\]\[0-9\]+\\\[\\\]))\\\}, \\\[\[rR\]\[0-9\]+\(:\[0-9\]+\)?\\\]!?\(\[ \]+@\[a-zA-Z0-9 \]+\)?\n" } } */
/* { dg-final { cleanup-saved-temps } } */ /* { dg-final { cleanup-saved-temps } } */
gcc/testsuite/gcc.target/arm/neon/vld2_dupu64.c
...@@ -15,5 +15,5 @@ void test_vld2_dupu64 (void) ...@@ -15,5 +15,5 @@ void test_vld2_dupu64 (void)
out_uint64x1x2_t = vld2_dup_u64 (0); out_uint64x1x2_t = vld2_dup_u64 (0);
} }
/* { dg-final { scan-assembler "vld1\.64\[ \]+\\\{((\[dD\]\[0-9\]+-\[dD\]\[0-9\]+)|(\[dD\]\[0-9\]+, \[dD\]\[0-9\]+))\\\}, \\\[\[rR\]\[0-9\]+\\\]!?\(\[ \]+@\[a-zA-Z0-9 \]+\)?\n" } } */ /* { dg-final { scan-assembler "vld1\.64\[ \]+\\\{((\[dD\]\[0-9\]+-\[dD\]\[0-9\]+)|(\[dD\]\[0-9\]+, \[dD\]\[0-9\]+))\\\}, \\\[\[rR\]\[0-9\]+\(:\[0-9\]+\)?\\\]!?\(\[ \]+@\[a-zA-Z0-9 \]+\)?\n" } } */
/* { dg-final { cleanup-saved-temps } } */ /* { dg-final { cleanup-saved-temps } } */
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