Commit 62e88293 by Richard Henderson Committed by Richard Henderson

alpha.c (aligned_memory_operand): Check MEM_ALIGN, don't check memory mode.

        * config/alpha/alpha.c (aligned_memory_operand): Check MEM_ALIGN,
        don't check memory mode.
        (unaligned_memory_operand): Likewise.
        (reload_inqi, reload_inhi, reload_outqi, reload_outhi): Don't
        abort for op0 not MEM.

        * config/alpha/alpha.c (alpha_expand_mov_nobwx): If the destination
        is not a reg, copy to a scratch first.
        (aligned_loadqi, aligned_loadhi, unaligned_loadqi, unaligned_loadhi,
        unaligned_loadqi_le, unaligned_loadqi_be, unaligned_loadhi_le,
        unaligned_loadhi_be): Expect op0 in DImode; don't SUBREG.
        (reload_inqi, reload_inhi): Fix mode of op0.
        (reload_inqi_help, reload_inhi_help, reload_outqi_help,
        reload_outhi_help): Likewise.  Use define_insn_and_split.

        * config/alpha/alpha.md (call peepholes): Check for REG_NORETURN
        as well as $29 dead.

From-SVN: r76172
parent c9a5b624
2004-01-19 Richard Henderson <rth@redhat.com>
* config/alpha/alpha.c (aligned_memory_operand): Check MEM_ALIGN,
don't check memory mode.
(unaligned_memory_operand): Likewise.
(reload_inqi, reload_inhi, reload_outqi, reload_outhi): Don't
abort for op0 not MEM.
* config/alpha/alpha.c (alpha_expand_mov_nobwx): If the destination
is not a reg, copy to a scratch first.
(aligned_loadqi, aligned_loadhi, unaligned_loadqi, unaligned_loadhi,
unaligned_loadqi_le, unaligned_loadqi_be, unaligned_loadhi_le,
unaligned_loadhi_be): Expect op0 in DImode; don't SUBREG.
(reload_inqi, reload_inhi): Fix mode of op0.
(reload_inqi_help, reload_inhi_help, reload_outqi_help,
reload_outhi_help): Likewise. Use define_insn_and_split.
* config/alpha/alpha.md (call peepholes): Check for REG_NORETURN
as well as $29 dead.
2004-01-19 Eric Botcazou <ebotcazou@libertysurf.fr> 2004-01-19 Eric Botcazou <ebotcazou@libertysurf.fr>
* config/sparc/sol2.h (ASM_DECLARE_OBJECT_NAME): New. Emit * config/sparc/sol2.h (ASM_DECLARE_OBJECT_NAME): New. Emit
......
...@@ -1219,9 +1219,10 @@ aligned_memory_operand (rtx op, enum machine_mode mode) ...@@ -1219,9 +1219,10 @@ aligned_memory_operand (rtx op, enum machine_mode mode)
} }
} }
if (GET_CODE (op) != MEM if (GET_CODE (op) != MEM)
|| GET_MODE (op) != mode)
return 0; return 0;
if (MEM_ALIGN (op) >= 32)
return 1;
op = XEXP (op, 0); op = XEXP (op, 0);
/* LEGITIMIZE_RELOAD_ADDRESS creates (plus (plus reg const_hi) const_lo) /* LEGITIMIZE_RELOAD_ADDRESS creates (plus (plus reg const_hi) const_lo)
...@@ -1261,8 +1262,9 @@ unaligned_memory_operand (rtx op, enum machine_mode mode) ...@@ -1261,8 +1262,9 @@ unaligned_memory_operand (rtx op, enum machine_mode mode)
} }
} }
if (GET_CODE (op) != MEM if (GET_CODE (op) != MEM)
|| GET_MODE (op) != mode) return 0;
if (MEM_ALIGN (op) >= 32)
return 0; return 0;
op = XEXP (op, 0); op = XEXP (op, 0);
...@@ -2876,13 +2878,24 @@ alpha_expand_mov_nobwx (enum machine_mode mode, rtx *operands) ...@@ -2876,13 +2878,24 @@ alpha_expand_mov_nobwx (enum machine_mode mode, rtx *operands)
{ {
rtx aligned_mem, bitnum; rtx aligned_mem, bitnum;
rtx scratch = gen_reg_rtx (SImode); rtx scratch = gen_reg_rtx (SImode);
rtx subtarget;
bool copyout;
get_aligned_mem (operands[1], &aligned_mem, &bitnum); get_aligned_mem (operands[1], &aligned_mem, &bitnum);
subtarget = operands[0];
if (GET_CODE (subtarget) == REG)
subtarget = gen_lowpart (DImode, subtarget), copyout = false;
else
subtarget = gen_reg_rtx (DImode), copyout = true;
emit_insn ((mode == QImode emit_insn ((mode == QImode
? gen_aligned_loadqi ? gen_aligned_loadqi
: gen_aligned_loadhi) : gen_aligned_loadhi)
(operands[0], aligned_mem, bitnum, scratch)); (subtarget, aligned_mem, bitnum, scratch));
if (copyout)
emit_move_insn (operands[0], gen_lowpart (mode, subtarget));
} }
} }
else else
...@@ -2891,16 +2904,28 @@ alpha_expand_mov_nobwx (enum machine_mode mode, rtx *operands) ...@@ -2891,16 +2904,28 @@ alpha_expand_mov_nobwx (enum machine_mode mode, rtx *operands)
code depend on parameter evaluation order which will cause code depend on parameter evaluation order which will cause
bootstrap failures. */ bootstrap failures. */
rtx temp1 = gen_reg_rtx (DImode); rtx temp1, temp2, seq, subtarget;
rtx temp2 = gen_reg_rtx (DImode); bool copyout;
rtx seq = ((mode == QImode
? gen_unaligned_loadqi temp1 = gen_reg_rtx (DImode);
: gen_unaligned_loadhi) temp2 = gen_reg_rtx (DImode);
(operands[0], get_unaligned_address (operands[1], 0),
temp1, temp2));
subtarget = operands[0];
if (GET_CODE (subtarget) == REG)
subtarget = gen_lowpart (DImode, subtarget), copyout = false;
else
subtarget = gen_reg_rtx (DImode), copyout = true;
seq = ((mode == QImode
? gen_unaligned_loadqi
: gen_unaligned_loadhi)
(subtarget, get_unaligned_address (operands[1], 0),
temp1, temp2));
alpha_set_memflags (seq, operands[1]); alpha_set_memflags (seq, operands[1]);
emit_insn (seq); emit_insn (seq);
if (copyout)
emit_move_insn (operands[0], gen_lowpart (mode, subtarget));
} }
return true; return true;
} }
......
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