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riscv-gcc-1
Commit 62cb0901 by Michael Meissner
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Use pic_offset_table_rtx instead of rs6000_pic_register; Rewrite int/float… 

Use pic_offset_table_rtx instead of rs6000_pic_register; Rewrite int/float conversions so reload allocates the temp

From-SVN: r11973
parent 3c75f397
Showing with 21 additions and 90 deletions
gcc/config/rs6000/rs6000.c
......@@ -99,12 +99,6 @@ int rs6000_save_toc_p;
/* ABI enumeration available for subtarget to use. */
enum rs6000_abi rs6000_current_abi;
/* Temporary memory used to convert integer -> float */
static rtx stack_temps[NUM_MACHINE_MODES];
/* Current PIC register used by the V4 code */
struct rtx_def *rs6000_pic_register = (struct rtx_def *)0;
/* Default register names. */
char rs6000_reg_names[][8] =
......@@ -1488,35 +1482,6 @@ expand_builtin_saveregs (args)
}
/* Allocate a stack temp. Only allocate one stack temp per type for a
function. */
struct rtx_def *
rs6000_stack_temp (mode, size)
enum machine_mode mode;
int size;
{
rtx temp = stack_temps[ (int)mode ];
rtx addr;
if (temp == NULL_RTX)
{
temp = assign_stack_local (mode, size, 0);
addr = XEXP (temp, 0);
if ((size > 4 && !offsettable_address_p (0, mode, addr))
|| (size <= 4 && !memory_address_p (mode, addr)))
{
XEXP (temp, 0) = copy_addr_to_reg (addr);
}
stack_temps[ (int)mode ] = temp;
}
return temp;
}
/* Generate a memory reference for expand_block_move, copying volatile,
and other bits from an original memory reference. */
......@@ -3467,10 +3432,6 @@ output_epilog (file, size)
int sp_offset = 0;
int i;
/* Forget about any temporaries created */
for (i = 0; i < NUM_MACHINE_MODES; i++)
stack_temps[i] = NULL_RTX;
/* If the last insn was a BARRIER, we don't have to write anything except
the trace table. */
if (GET_CODE (insn) == NOTE)
......@@ -3765,7 +3726,7 @@ output_epilog (file, size)
/* Reset varargs and save TOC indicator */
rs6000_sysv_varargs_p = 0;
rs6000_save_toc_p = 0;
rs6000_pic_register = (rtx)0;
pic_offset_table_rtx = (rtx)0;
if (DEFAULT_ABI == ABI_NT)
{
......
gcc/config/rs6000/rs6000.h
......@@ -1884,10 +1884,6 @@ typedef struct rs6000_args
/* #define FINALIZE_PIC */
/* Current PIC register used by the V4 code */
extern struct rtx_def *rs6000_pic_register;
/* A C expression that is nonzero if X is a legitimate immediate
operand on the target machine when generating position independent
code. You can assume that X satisfies `CONSTANT_P', so you need
......
gcc/config/rs6000/rs6000.md
......@@ -3573,54 +3573,29 @@
}")
(define_expand "move_to_float"
[(set (match_operand:DF 0 "gpc_reg_operand" "")
(unspec [(match_operand:SI 1 "gpc_reg_operand" "")
(match_operand:SI 2 "gpc_reg_operand" "")
(match_dup 3)] 2))]
[(set (match_dup 4) ;; low word
(match_operand:SI 1 "register_operand" ""))
(set (match_dup 5) ;; high word
(match_operand:SI 2 "register_operand" ""))
(set (match_operand:SI 0 "register_operand" "") ;; float value
(match_dup 3))]
"! TARGET_POWERPC64 && TARGET_HARD_FLOAT"
"
{
operands[3] = XEXP (rs6000_stack_temp (DFmode, 8, 1), 0);
}")
(define_split
[(set (match_operand:DF 0 "gpc_reg_operand" "")
(unspec [(match_operand:SI 1 "gpc_reg_operand" "")
(match_operand:SI 2 "gpc_reg_operand" "")
(match_operand:SI 3 "offsettable_addr_operand" "")] 2))]
"reload_completed"
[(set (match_dup 4) (match_dup 1))
(set (match_dup 5) (match_dup 2))
(set (match_dup 0) (mem:DF (match_dup 3)))]
"
{
rtx word1 = gen_rtx (MEM, SImode, operands[3]);
rtx word2 = gen_rtx (MEM, SImode, plus_constant (operands[3], 4));
MEM_IN_STRUCT_P (word1) = 1;
MEM_IN_STRUCT_P (word2) = 1;
operands[3] = gen_reg_rtx (DFmode);
if (WORDS_BIG_ENDIAN)
{
operands[4] = word2;
operands[5] = word1;
operands[4] = gen_rtx (SUBREG, SImode, operands[3], 1);
operands[5] = gen_rtx (SUBREG, SImode, operands[3], 0);
}
else
{
operands[4] = word1;
operands[5] = word2;
operands[4] = gen_rtx (SUBREG, SImode, operands[3], 0);
operands[5] = gen_rtx (SUBREG, SImode, operands[3], 1);
}
}")
(define_insn ""
[(set (match_operand:DF 0 "gpc_reg_operand" "=f")
(unspec [(match_operand:SI 1 "gpc_reg_operand" "r")
(match_operand:SI 2 "gpc_reg_operand" "r")
(match_operand:SI 3 "offsettable_addr_operand" "p")] 2))]
"! TARGET_POWERPC64 && TARGET_HARD_FLOAT"
"#"
[(set_attr "length" "12")])
(define_expand "fix_truncdfsi2"
[(set (match_operand:SI 0 "gpc_reg_operand" "")
(fix:SI (match_operand:DF 1 "gpc_reg_operand" "")))]
......@@ -3629,13 +3604,12 @@
{
if (TARGET_POWER2 || TARGET_POWERPC)
{
rtx stack_slot = rs6000_stack_temp (DImode, 8, 1);
rtx temp = gen_reg_rtx (DImode);
rtx temp1 = gen_reg_rtx (DImode);
rtx temp2 = gen_reg_rtx (SImode);
emit_insn (gen_fpcvtsi (temp, operands[1]));
emit_move_insn (stack_slot, temp);
emit_move_insn (operands[0],
gen_rtx (SUBREG, SImode, stack_slot, WORDS_BIG_ENDIAN));
emit_insn (gen_fpcvtsi (temp1, operands[1]));
emit_move_insn (temp2, gen_rtx (SUBREG, SImode, temp1, WORDS_BIG_ENDIAN));
emit_move_insn (operands[0], temp2);
DONE;
}
else
......@@ -4824,13 +4798,13 @@
"(DEFAULT_ABI == ABI_V4 || DEFAULT_ABI == ABI_SOLARIS) && flag_pic"
"
{
if (!rs6000_pic_register)
if (!pic_offset_table_rtx)
{
rs6000_pic_register = gen_reg_rtx (SImode);
emit_insn (gen_init_v4_pic (rs6000_pic_register));
pic_offset_table_rtx = gen_reg_rtx (SImode);
emit_insn (gen_init_v4_pic (pic_offset_table_rtx));
}
operands[2] = rs6000_pic_register;
operands[2] = pic_offset_table_rtx;
if (flag_pic > 1)
{
emit_insn (gen_movsi_got_large (operands[0], operands[1], operands[2]));
......
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