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riscv-gcc-1
Commit 62c1b965 by Richard Earnshaw Committed by Richard Earnshaw
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[ARM] Remove redundant model field from FPU descriptions 

	* arm.h (TARGET_VFP): Unconditionally define to 1.
	(arm_fpu_desc): Remove 'model' field.
	(TARGET_FPU_MODEL): Delete.
	* arm.c (all_fpus): Don't initialize the model field.
	(arm_can_inline_p): Don't check the FPU model.
	* arm-fpus.def: Remove redundant model field from all FPU
	descriptions.

From-SVN: r241116
parent 8eb8461d
Showing with 36 additions and 29 deletions
gcc/ChangeLog
2016-10-13 Richard Earsnhaw <rearnsha@arm.com>
* arm.h (TARGET_VFP): Unconditionally define to 1.
(arm_fpu_desc): Remove 'model' field.
(TARGET_FPU_MODEL): Delete.
* arm.c (all_fpus): Don't initialize the model field.
(arm_can_inline_p): Don't check the FPU model.
* arm-fpus.def: Remove redundant model field from all FPU
descriptions.
2016-10-13 Richard Biener <rguenther@suse.de>
PR middle-end/77826
......
gcc/config/arm/arm-fpus.def
......@@ -19,30 +19,29 @@
/* Before using #include to read this file, define a macro:
ARM_FPU(NAME, MODEL, REV, VFP_REGS, FEATURES)
ARM_FPU(NAME, REV, VFP_REGS, FEATURES)
The arguments are the fields of struct arm_fpu_desc.
genopt.sh assumes no whitespace up to the first "," in each entry. */
ARM_FPU("vfp", ARM_FP_MODEL_VFP, 2, VFP_REG_D16, FPU_FL_NONE)
ARM_FPU("vfpv3", ARM_FP_MODEL_VFP, 3, VFP_REG_D32, FPU_FL_NONE)
ARM_FPU("vfpv3-fp16", ARM_FP_MODEL_VFP, 3, VFP_REG_D32, FPU_FL_FP16)
ARM_FPU("vfpv3-d16", ARM_FP_MODEL_VFP, 3, VFP_REG_D16, FPU_FL_NONE)
ARM_FPU("vfpv3-d16-fp16", ARM_FP_MODEL_VFP, 3, VFP_REG_D16, FPU_FL_FP16)
ARM_FPU("vfpv3xd", ARM_FP_MODEL_VFP, 3, VFP_REG_SINGLE, FPU_FL_NONE)
ARM_FPU("vfpv3xd-fp16", ARM_FP_MODEL_VFP, 3, VFP_REG_SINGLE, FPU_FL_FP16)
ARM_FPU("neon", ARM_FP_MODEL_VFP, 3, VFP_REG_D32, FPU_FL_NEON)
ARM_FPU("neon-fp16", ARM_FP_MODEL_VFP, 3, VFP_REG_D32, FPU_FL_NEON | FPU_FL_FP16)
ARM_FPU("vfpv4", ARM_FP_MODEL_VFP, 4, VFP_REG_D32, FPU_FL_FP16)
ARM_FPU("vfpv4-d16", ARM_FP_MODEL_VFP, 4, VFP_REG_D16, FPU_FL_FP16)
ARM_FPU("fpv4-sp-d16", ARM_FP_MODEL_VFP, 4, VFP_REG_SINGLE, FPU_FL_FP16)
ARM_FPU("fpv5-sp-d16", ARM_FP_MODEL_VFP, 5, VFP_REG_SINGLE, FPU_FL_FP16)
ARM_FPU("fpv5-d16", ARM_FP_MODEL_VFP, 5, VFP_REG_D16, FPU_FL_FP16)
ARM_FPU("neon-vfpv4", ARM_FP_MODEL_VFP, 4, VFP_REG_D32, FPU_FL_NEON | FPU_FL_FP16)
ARM_FPU("fp-armv8", ARM_FP_MODEL_VFP, 8, VFP_REG_D32, FPU_FL_FP16)
ARM_FPU("neon-fp-armv8",ARM_FP_MODEL_VFP, 8, VFP_REG_D32, FPU_FL_NEON | FPU_FL_FP16)
ARM_FPU("crypto-neon-fp-armv8",
ARM_FP_MODEL_VFP, 8, VFP_REG_D32, FPU_FL_NEON | FPU_FL_FP16 | FPU_FL_CRYPTO)
ARM_FPU("vfp", 2, VFP_REG_D16, FPU_FL_NONE)
ARM_FPU("vfpv3", 3, VFP_REG_D32, FPU_FL_NONE)
ARM_FPU("vfpv3-fp16", 3, VFP_REG_D32, FPU_FL_FP16)
ARM_FPU("vfpv3-d16", 3, VFP_REG_D16, FPU_FL_NONE)
ARM_FPU("vfpv3-d16-fp16", 3, VFP_REG_D16, FPU_FL_FP16)
ARM_FPU("vfpv3xd", 3, VFP_REG_SINGLE, FPU_FL_NONE)
ARM_FPU("vfpv3xd-fp16", 3, VFP_REG_SINGLE, FPU_FL_FP16)
ARM_FPU("neon", 3, VFP_REG_D32, FPU_FL_NEON)
ARM_FPU("neon-fp16", 3, VFP_REG_D32, FPU_FL_NEON | FPU_FL_FP16)
ARM_FPU("vfpv4", 4, VFP_REG_D32, FPU_FL_FP16)
ARM_FPU("vfpv4-d16", 4, VFP_REG_D16, FPU_FL_FP16)
ARM_FPU("fpv4-sp-d16", 4, VFP_REG_SINGLE, FPU_FL_FP16)
ARM_FPU("fpv5-sp-d16", 5, VFP_REG_SINGLE, FPU_FL_FP16)
ARM_FPU("fpv5-d16", 5, VFP_REG_D16, FPU_FL_FP16)
ARM_FPU("neon-vfpv4", 4, VFP_REG_D32, FPU_FL_NEON | FPU_FL_FP16)
ARM_FPU("fp-armv8", 8, VFP_REG_D32, FPU_FL_FP16)
ARM_FPU("neon-fp-armv8", 8, VFP_REG_D32, FPU_FL_NEON | FPU_FL_FP16)
ARM_FPU("crypto-neon-fp-armv8", 8, VFP_REG_D32, FPU_FL_NEON | FPU_FL_FP16 | FPU_FL_CRYPTO)
/* Compatibility aliases. */
ARM_FPU("vfp3", ARM_FP_MODEL_VFP, 3, VFP_REG_D32, FPU_FL_NONE)
ARM_FPU("vfp3", 3, VFP_REG_D32, FPU_FL_NONE)
gcc/config/arm/arm.c
......@@ -2334,8 +2334,8 @@ char arm_arch_name[] = "__ARM_ARCH_PROFILE__";
const struct arm_fpu_desc all_fpus[] =
{
#define ARM_FPU(NAME, MODEL, REV, VFP_REGS, FEATURES) \
{ NAME, MODEL, REV, VFP_REGS, FEATURES },
#define ARM_FPU(NAME, REV, VFP_REGS, FEATURES) \
{ NAME, REV, VFP_REGS, FEATURES },
#include "arm-fpus.def"
#undef ARM_FPU
};
......@@ -30226,9 +30226,8 @@ arm_can_inline_p (tree caller, tree callee)
if ((caller_fpu->features & callee_fpu->features) != callee_fpu->features)
return false;
/* Need same model and regs. */
if (callee_fpu->model != caller_fpu->model
|| callee_fpu->regs != callee_fpu->regs)
/* Need same FPU regs. */
if (callee_fpu->regs != callee_fpu->regs)
return false;
/* OK to inline between different modes.
......
gcc/config/arm/arm.h
......@@ -134,7 +134,8 @@ extern void (*arm_lang_output_object_attributes_hook)(void);
#define TARGET_HARD_FLOAT (arm_float_abi != ARM_FLOAT_ABI_SOFT)
/* Use hardware floating point calling convention. */
#define TARGET_HARD_FLOAT_ABI (arm_float_abi == ARM_FLOAT_ABI_HARD)
#define TARGET_VFP (TARGET_FPU_MODEL == ARM_FP_MODEL_VFP)
/* We only support the VFP model these days. */
#define TARGET_VFP (1)
#define TARGET_IWMMXT (arm_arch_iwmmxt)
#define TARGET_IWMMXT2 (arm_arch_iwmmxt2)
#define TARGET_REALLY_IWMMXT (TARGET_IWMMXT && TARGET_32BIT)
......@@ -363,7 +364,6 @@ enum vfp_reg_type
extern const struct arm_fpu_desc
{
const char *name;
enum arm_fp_model model;
int rev;
enum vfp_reg_type regs;
arm_fpu_feature_set features;
......@@ -372,7 +372,6 @@ extern const struct arm_fpu_desc
/* Accessors. */
#define TARGET_FPU_NAME (all_fpus[arm_fpu_index].name)
#define TARGET_FPU_MODEL (all_fpus[arm_fpu_index].model)
#define TARGET_FPU_REV (all_fpus[arm_fpu_index].rev)
#define TARGET_FPU_REGS (all_fpus[arm_fpu_index].regs)
#define TARGET_FPU_FEATURES (all_fpus[arm_fpu_index].features)
......
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