Commit 6279fcd6 by Kyrylo Tkachov Committed by Kyrylo Tkachov

[arm] Add support for Arm Ares

This adds support for the Arm Ares CPU for in the arm port.
It implements the Armv8.2-A architecture with the optional features
of statistical profiling, dot product and FP16 on by default.

Note: Ares is a codename to enable early adopters and in time
we will add the final product name once it's announced. 

	* config/arm/arm-cpus.in (ares): New entry.
	* config/arm/arm-tables.opt: Regenerate.
	* config/arm/arm-tune.md: Likewise.
	* doc/invoke.texi (ARM Options): Document ares.

From-SVN: r265881
parent ce1485c1
2018-11-07 Kyrylo Tkachov <kyrylo.tkachov@arm.com> 2018-11-07 Kyrylo Tkachov <kyrylo.tkachov@arm.com>
* config/arm/arm-cpus.in (ares): New entry.
* config/arm/arm-tables.opt: Regenerate.
* config/arm/arm-tune.md: Likewise.
* doc/invoke.texi (ARM Options): Document ares.
2018-11-07 Kyrylo Tkachov <kyrylo.tkachov@arm.com>
* config/aarch64/aarch64-cores.def (ares): Define. * config/aarch64/aarch64-cores.def (ares): Define.
* config/aarch64/aarch64-tune.md: Regenerate. * config/aarch64/aarch64-tune.md: Regenerate.
* doc/invoke.texi (AArch64 Options): Document ares value for mtune. * doc/invoke.texi (AArch64 Options): Document ares value for mtune.
...@@ -1376,6 +1376,17 @@ begin cpu cortex-a76 ...@@ -1376,6 +1376,17 @@ begin cpu cortex-a76
part d0b part d0b
end cpu cortex-a76 end cpu cortex-a76
begin cpu ares
cname ares
tune for cortex-a57
tune flags LDSCHED
architecture armv8.2-a+fp16+dotprod+simd
option crypto add FP_ARMv8 CRYPTO
costs cortex_a57
vendor 41
part d0c
end cpu ares
# ARMv8.2 A-profile ARM DynamIQ big.LITTLE implementations # ARMv8.2 A-profile ARM DynamIQ big.LITTLE implementations
begin cpu cortex-a75.cortex-a55 begin cpu cortex-a75.cortex-a55
cname cortexa75cortexa55 cname cortexa75cortexa55
......
...@@ -283,6 +283,9 @@ EnumValue ...@@ -283,6 +283,9 @@ EnumValue
Enum(processor_type) String(cortex-a76) Value( TARGET_CPU_cortexa76) Enum(processor_type) String(cortex-a76) Value( TARGET_CPU_cortexa76)
EnumValue EnumValue
Enum(processor_type) String(ares) Value( TARGET_CPU_ares)
EnumValue
Enum(processor_type) String(cortex-a75.cortex-a55) Value( TARGET_CPU_cortexa75cortexa55) Enum(processor_type) String(cortex-a75.cortex-a55) Value( TARGET_CPU_cortexa75cortexa55)
EnumValue EnumValue
......
...@@ -49,7 +49,7 @@ ...@@ -49,7 +49,7 @@
cortexa72,cortexa73,exynosm1, cortexa72,cortexa73,exynosm1,
xgene1,cortexa57cortexa53,cortexa72cortexa53, xgene1,cortexa57cortexa53,cortexa72cortexa53,
cortexa73cortexa35,cortexa73cortexa53,cortexa55, cortexa73cortexa35,cortexa73cortexa53,cortexa55,
cortexa75,cortexa76,cortexa75cortexa55, cortexa75,cortexa76,ares,
cortexa76cortexa55,cortexm23,cortexm33, cortexa75cortexa55,cortexa76cortexa55,cortexm23,
cortexr52" cortexm33,cortexr52"
(const (symbol_ref "((enum attr_tune) arm_tune)"))) (const (symbol_ref "((enum attr_tune) arm_tune)")))
...@@ -16708,8 +16708,8 @@ Permissible names are: @samp{arm2}, @samp{arm250}, ...@@ -16708,8 +16708,8 @@ Permissible names are: @samp{arm2}, @samp{arm250},
@samp{cortex-a9}, @samp{cortex-a12}, @samp{cortex-a15}, @samp{cortex-a17}, @samp{cortex-a9}, @samp{cortex-a12}, @samp{cortex-a15}, @samp{cortex-a17},
@samp{cortex-a32}, @samp{cortex-a35}, @samp{cortex-a53}, @samp{cortex-a55}, @samp{cortex-a32}, @samp{cortex-a35}, @samp{cortex-a53}, @samp{cortex-a55},
@samp{cortex-a57}, @samp{cortex-a72}, @samp{cortex-a73}, @samp{cortex-a75}, @samp{cortex-a57}, @samp{cortex-a72}, @samp{cortex-a73}, @samp{cortex-a75},
@samp{cortex-a76}, @samp{cortex-r4}, @samp{cortex-r4f}, @samp{cortex-r5}, @samp{cortex-a76}, @samp{ares}, @samp{cortex-r4}, @samp{cortex-r4f},
@samp{cortex-r7}, @samp{cortex-r8}, @samp{cortex-r52}, @samp{cortex-r5}, @samp{cortex-r7}, @samp{cortex-r8}, @samp{cortex-r52},
@samp{cortex-m33}, @samp{cortex-m33},
@samp{cortex-m23}, @samp{cortex-m23},
@samp{cortex-m7}, @samp{cortex-m7},
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