Commit 61aeb06f by Kazu Hirata Committed by Kazu Hirata

install.texi: Fix typos.

	* doc/install.texi: Fix typos.
	* doc/invoke.texi: Likewise.
	* doc/tm.texi: Likewise.

From-SVN: r68951
parent 802491c0
2003-07-04 Kazu Hirata <kazu@cs.umass.edu>
* doc/install.texi: Fix typos.
* doc/invoke.texi: Likewise.
* doc/tm.texi: Likewise.
2003-07-04 Kazu Hirata <kazu@cs.umass.edu>
* config/pa/fptr.c: Fix comment typos.
* config/pa/pa-64.h: Likewise.
* config/pa/pa.c: Likewise.
......
......@@ -2111,7 +2111,7 @@ require GNU binutils 2.13 or newer. Such subtargets include:
<hr />
@end html
@heading @anchor{arm-*-coff}arm-*-coff
ARM-family processors. Note that there are two diffierent varieties
ARM-family processors. Note that there are two different varieties
of PE format subtarget supported: @code{arm-wince-pe} and
@code{arm-pe} as well as a standard COFF target @code{arm-*-coff}.
......
......@@ -3954,7 +3954,7 @@ sense when scheduling before register allocation, i.e.@: with
@item -fsched2-use-superblocks
@opindex fsched2-use-superblocks
When schedulilng after register allocation, do use superblock scheduling
When scheduling after register allocation, do use superblock scheduling
algorithm. Superblock scheduling allows motion across basic block boundaries
resulting on faster schedules. This option is experimental, as not all machine
descriptions used by GCC model the CPU closely enough to avoid unreliable
......
......@@ -3256,7 +3256,7 @@ If this macro is not defined, it defaults to
Define this macro if the target's representation for dwarf registers
is different than the internal representation for unwind column.
Given a dwarf register, this macro should return the interal unwind
Given a dwarf register, this macro should return the internal unwind
column number to use instead.
See the PowerPC's SPE target for an example.
......
Markdown is supported
0% or
You are about to add 0 people to the discussion. Proceed with caution.
Finish editing this message first!
Please register or to comment