re PR target/41076 ([avr] pessimal code for logical OR of 8-bit fields)

	PR target/41076
	* confg/avr/avr.md (*iorhi3.ashift8-ext.zerox): Add "r,r,0"
	alternative.

From-SVN: r253343

gcc/ChangeLog

+2017-10-02  Georg-Johann Lay  <avr@gjlay.de>
+
+	PR target/41076
+	* confg/avr/avr.md (*iorhi3.ashift8-ext.zerox): Add "r,r,0"
+	alternative.
+
 2017-10-02  Richard Biener  <rguenther@suse.de>
 
 	* graphite-isl-ast-to-gimple.c (set_codegen_error): With

gcc/config/avr/avr.md

@@ -6804,11 +6804,11 @@
 
 
 (define_insn_and_split "*iorhi3.ashift8-ext.zerox"
-  [(set (match_operand:HI 0 "register_operand"                        "=r")
+  [(set (match_operand:HI 0 "register_operand"                        "=r,r")
         (ior:HI (ashift:HI (any_extend:HI
-                            (match_operand:QI 1 "register_operand"     "r"))
+                            (match_operand:QI 1 "register_operand"     "r,r"))
                            (const_int 8))
-                (zero_extend:HI (match_operand:QI 2 "register_operand" "r"))))]
+                (zero_extend:HI (match_operand:QI 2 "register_operand" "0,r"))))]
   "optimize"
   { gcc_unreachable(); }
   "&& reload_completed"