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Commit 60b85c4c by Eric Botcazou Committed by Eric Botcazou
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invoke.texi (SPARC options): Remove -mflat and all -mxxx (xxx:chip) options. 

	* doc/invoke.texi (SPARC options): Remove -mflat and
	all -mxxx (xxx:chip) options.
	* config/sparc/aout.h (DBX_REGISTER_NUMBER): Delete.
	* config/sparc/litecoff.h (DBX_REGISTER_NUMBER): Likewise.
	* config/sparc/netbsd-elf.h (DBX_REGISTER_NUMBER): Likewise.
	* config/sparc/sol2.h (DBX_REGISTER_NUMBER): Likewise.
	* config/sparc/sparc-protos.h: Delete sparc_flat_* prototypes.
	* config/sparc/sparc.c: Likewise.
	(sparc_output_function_prologue): Remove TARGET_FLAT handling.
	(sparc_nonflat_function_prologue): Rename into sparc_function_prologue.
	(sparc_output_function_epilogue): Remove TARGET_FLAT handling.
	(sparc_nonflat_function_epilogue): Rename into sparc_function_epilogue.
	(struct sparc_frame_info, current_frame_info, zero_frame_info): Delete.
	(sparc_flat_must_save_register_p): Likewise.
	(sparc_flat_compute_frame_size): Likewise.
	(sparc_flat_save_restore): Likewise.
	(sparc_flat_function_prologue): Likewise.
	(sparc_flat_function_epilogue): Likewise.
	(sparc_flat_epilogue_delay_slots): Likewise.
	(sparc_flat_eligible_for_epilogue_delay): Likewise.
	(sparc_function_ok_for_sibcall): Remove TARGET_FLAT handling.
	* config/sparc/sparc.h (MASK_FLAT, TARGET_FLAT): Delete.
	(TARGET_SWITCHES): Remove -mflat and all -mxxx (xxx:chip) options.
	(SPARC_INCOMING_INT_ARG_FIRST): Remove TARGET_FLAT handling.
	(CONDITIONAL_REGISTER_USAGE): Likewise.
	(FRAME_POINTER_REQUIRED): Likewise.
	(INITIAL_ELIMINATION_OFFSET): Likewise.
	(BASE_RETURN_VALUE_REG): Likewise.
	(BASE_OUTGOING_VALUE_REG): Likewise.
	(BASE_PASSING_ARG_REG): Likewise.
	(BASE_INCOMING_ARG_REG): Likewise.
	(INCOMING_REGNO): Likewise.
	(OUTGOING_REGNO): Likewise.
	(LOCAL_REGNO): Likewise.
	(DELAY_SLOTS_FOR_EPILOGUE): Likewise.
	(ELIGIBLE_FOR_EPILOGUE_DELAY): Likewise.
	(EPILOGUE_USES): Likewise.
	* config/sparc/sparc.md ("isa" attribute): Change "v6" into "v7".
	("flat" attribute): Delete.
	(do_builtin_setjmp_setup): Remove TARGET_FLAT and "flat" attribute
	handling.
	(call followed by jump define_peephole's): Delete.
	(exception_receiver): Likewise.
	(builtin_setjmp_receiver): Likewise.
	* config/sparc/t-sparclite (MULTILIB_OPTIONS): Remove -mflat.

From-SVN: r77169
parent e57e265b
Showing with 83 additions and 210 deletions
gcc/ChangeLog
2004-02-03 Eric Botcazou <ebotcazou@libertysurf.fr>
* doc/invoke.texi (SPARC options): Remove -mflat and
all -mxxx (xxx:chip) options.
* config/sparc/aout.h (DBX_REGISTER_NUMBER): Delete.
* config/sparc/litecoff.h (DBX_REGISTER_NUMBER): Likewise.
* config/sparc/netbsd-elf.h (DBX_REGISTER_NUMBER): Likewise.
* config/sparc/sol2.h (DBX_REGISTER_NUMBER): Likewise.
* config/sparc/sparc-protos.h: Delete sparc_flat_* prototypes.
* config/sparc/sparc.c: Likewise.
(sparc_output_function_prologue): Remove TARGET_FLAT handling.
(sparc_nonflat_function_prologue): Rename into sparc_function_prologue.
(sparc_output_function_epilogue): Remove TARGET_FLAT handling.
(sparc_nonflat_function_epilogue): Rename into sparc_function_epilogue.
(struct sparc_frame_info, current_frame_info, zero_frame_info): Delete.
(sparc_flat_must_save_register_p): Likewise.
(sparc_flat_compute_frame_size): Likewise.
(sparc_flat_save_restore): Likewise.
(sparc_flat_function_prologue): Likewise.
(sparc_flat_function_epilogue): Likewise.
(sparc_flat_epilogue_delay_slots): Likewise.
(sparc_flat_eligible_for_epilogue_delay): Likewise.
(sparc_function_ok_for_sibcall): Remove TARGET_FLAT handling.
* config/sparc/sparc.h (MASK_FLAT, TARGET_FLAT): Delete.
(TARGET_SWITCHES): Remove -mflat and all -mxxx (xxx:chip) options.
(SPARC_INCOMING_INT_ARG_FIRST): Remove TARGET_FLAT handling.
(CONDITIONAL_REGISTER_USAGE): Likewise.
(FRAME_POINTER_REQUIRED): Likewise.
(INITIAL_ELIMINATION_OFFSET): Likewise.
(BASE_RETURN_VALUE_REG): Likewise.
(BASE_OUTGOING_VALUE_REG): Likewise.
(BASE_PASSING_ARG_REG): Likewise.
(BASE_INCOMING_ARG_REG): Likewise.
(INCOMING_REGNO): Likewise.
(OUTGOING_REGNO): Likewise.
(LOCAL_REGNO): Likewise.
(DELAY_SLOTS_FOR_EPILOGUE): Likewise.
(ELIGIBLE_FOR_EPILOGUE_DELAY): Likewise.
(EPILOGUE_USES): Likewise.
* config/sparc/sparc.md ("isa" attribute): Change "v6" into "v7".
("flat" attribute): Delete.
(do_builtin_setjmp_setup): Remove TARGET_FLAT and "flat" attribute
handling.
(call followed by jump define_peephole's): Delete.
(exception_receiver): Likewise.
(builtin_setjmp_receiver): Likewise.
* config/sparc/t-sparclite (MULTILIB_OPTIONS): Remove -mflat.
2004-02-03 Paolo Bonzini <bonzini@gnu.org>
PR c/11658
......
gcc/config/sparc/aout.h
......@@ -48,12 +48,6 @@ do { \
#define DATA_SECTION_ASM_OP "\t.data"
/* How to renumber registers for dbx and gdb. In the flat model, the frame
pointer is really %i7. */
#define DBX_REGISTER_NUMBER(REGNO) \
(TARGET_FLAT && (REGNO) == HARD_FRAME_POINTER_REGNUM ? 31 : REGNO)
/* This is how to output a note to DBX telling it the line number
to which the following sequence of instructions corresponds.
......
gcc/config/sparc/litecoff.h
......@@ -61,9 +61,3 @@ do { \
/* Output before writable data. */
#define DATA_SECTION_ASM_OP "\t.data"
/* How to renumber registers for dbx and gdb. In the flat model, the frame
pointer is really %i7. */
#define DBX_REGISTER_NUMBER(REGNO) \
(TARGET_FLAT && (REGNO) == HARD_FRAME_POINTER_REGNUM ? 31 : REGNO)
gcc/config/sparc/netbsd-elf.h
......@@ -59,10 +59,6 @@ Boston, MA 02111-1307, USA. */
#undef DBX_CONTIN_CHAR
#define DBX_CONTIN_CHAR '?'
#undef DBX_REGISTER_NUMBER
#define DBX_REGISTER_NUMBER(REGNO) \
(TARGET_FLAT && REGNO == HARD_FRAME_POINTER_REGNUM ? 31 : REGNO)
#undef LOCAL_LABEL_PREFIX
#define LOCAL_LABEL_PREFIX "."
......
gcc/config/sparc/sol2.h
......@@ -57,11 +57,6 @@ Boston, MA 02111-1307, USA. */
/* However it appears that Solaris 2.0 uses the same reg numbering as
the old BSD-style system did. */
/* Same as sparc.h */
#undef DBX_REGISTER_NUMBER
#define DBX_REGISTER_NUMBER(REGNO) \
(TARGET_FLAT && (REGNO) == HARD_FRAME_POINTER_REGNUM ? 31 : REGNO)
/* The Solaris 2 assembler uses .skip, not .zero, so put this back. */
#undef ASM_OUTPUT_SKIP
#define ASM_OUTPUT_SKIP(FILE,SIZE) \
......
gcc/config/sparc/sparc-protos.h
......@@ -53,8 +53,6 @@ extern void order_regs_for_local_alloc (void);
extern HOST_WIDE_INT compute_frame_size (HOST_WIDE_INT, int);
extern int check_pic (int);
extern int short_branch (int, int);
extern int sparc_flat_epilogue_delay_slots (void);
extern HOST_WIDE_INT sparc_flat_compute_frame_size (HOST_WIDE_INT);
extern void sparc_profile_hook (int);
extern void sparc_override_options (void);
extern int leaf_return_peephole_ok (void);
......@@ -111,7 +109,6 @@ extern int pic_address_needs_scratch (rtx);
extern int reg_unused_after (rtx, rtx);
extern int register_ok_for_ldd (rtx);
extern int registers_ok_for_ldd_peep (rtx, rtx);
extern int sparc_flat_eligible_for_epilogue_delay (rtx, int);
extern int v9_regcmp_p (enum rtx_code);
extern char *sparc_v8plus_shift (rtx *, rtx, const char *);
/* Function used for V8+ code generation. Returns 1 if the high
......
gcc/config/sparc/sparc.h
......@@ -442,12 +442,7 @@ extern int target_flags;
#define MASK_IMPURE_TEXT 0x100
#define TARGET_IMPURE_TEXT (target_flags & MASK_IMPURE_TEXT)
/* Nonzero means that we should generate code using a flat register window
model, i.e. no save/restore instructions are generated, which is
compatible with normal sparc code.
The frame pointer is %i7 instead of %fp. */
#define MASK_FLAT 0x200
#define TARGET_FLAT (target_flags & MASK_FLAT)
/* 0x200 is unused */
/* Nonzero means use the registers that the SPARC ABI reserves for
application software. This must be the default to coincide with the
......@@ -551,10 +546,6 @@ extern int target_flags;
N_("Pass -assert pure-text to linker") }, \
{"no-impure-text", -MASK_IMPURE_TEXT, \
N_("Do not pass -assert pure-text to linker") }, \
{"flat", MASK_FLAT, \
N_("Use flat register window model") }, \
{"no-flat", -MASK_FLAT, \
N_("Do not use flat register window model") }, \
{"app-regs", MASK_APP_REGS, \
N_("Use ABI reserved registers") }, \
{"no-app-regs", -MASK_APP_REGS, \
......@@ -571,20 +562,6 @@ extern int target_flags;
N_("Utilize Visual Instruction Set") }, \
{"no-vis", -MASK_VIS, \
N_("Do not utilize Visual Instruction Set") }, \
/* ??? These are deprecated, coerced to -mcpu=. Delete in 2.9. */ \
{"cypress", 0, \
N_("Optimize for Cypress processors") }, \
{"sparclite", 0, \
N_("Optimize for SPARCLite processors") }, \
{"f930", 0, \
N_("Optimize for F930 processors") }, \
{"f934", 0, \
N_("Optimize for F934 processors") }, \
{"v8", 0, \
N_("Use V8 SPARC ISA") }, \
{"supersparc", 0, \
N_("Optimize for SuperSPARC processors") }, \
/* End of deprecated options. */ \
{"ptr64", MASK_PTR64, \
N_("Pointers are 64-bit") }, \
{"ptr32", -MASK_PTR64, \
......@@ -874,7 +851,7 @@ if (TARGET_ARCH64 \
/* Argument passing regs. */
#define SPARC_OUTGOING_INT_ARG_FIRST 8
#define SPARC_INCOMING_INT_ARG_FIRST (TARGET_FLAT ? 8 : 24)
#define SPARC_INCOMING_INT_ARG_FIRST 24
#define SPARC_FP_ARG_FIRST 32
/* 1 for registers that have pervasive standard uses
......@@ -995,19 +972,6 @@ do \
fixed_regs[4] = 1; \
else if (fixed_regs[4] == 2) \
fixed_regs[4] = 0; \
if (TARGET_FLAT) \
{ \
int regno; \
/* Let the compiler believe the frame pointer is still \
%fp, but output it as %i7. */ \
fixed_regs[31] = 1; \
reg_names[HARD_FRAME_POINTER_REGNUM] = "%i7"; \
/* Disable leaf functions */ \
memset (sparc_leaf_regs, 0, FIRST_PSEUDO_REGISTER); \
/* Make LEAF_REG_REMAP a noop. */ \
for (regno = 0; regno < FIRST_PSEUDO_REGISTER; regno++) \
leaf_reg_remap [regno] = regno; \
} \
} \
while (0)
......@@ -1100,16 +1064,9 @@ extern int sparc_mode_class[];
Zero means the frame pointer need not be set up (and parms
may be accessed via the stack pointer) in functions that seem suitable.
This is computed in `reload', in reload1.c.
Used in flow.c, global.c, and reload1.c.
Being a non-leaf function does not mean a frame pointer is needed in the
flat window model. However, the debugger won't be able to backtrace through
us with out it. */
#define FRAME_POINTER_REQUIRED \
(TARGET_FLAT \
? (current_function_calls_alloca \
|| !leaf_function_p ()) \
: ! (leaf_function_p () && only_leaf_regs_used ()))
Used in flow.c, global.c, and reload1.c. */
#define FRAME_POINTER_REQUIRED \
(! (leaf_function_p () && only_leaf_regs_used ()))
/* Base register for access to arguments of the function. */
#define ARG_POINTER_REGNUM FRAME_POINTER_REGNUM
......@@ -1573,7 +1530,6 @@ extern char leaf_reg_remap[];
#define REG_PARM_STACK_SPACE(DECL) (6 * UNITS_PER_WORD)
/* Definitions for register elimination. */
/* ??? In TARGET_FLAT mode we needn't have a hard frame pointer. */
#define ELIMINABLE_REGS \
{{ FRAME_POINTER_REGNUM, STACK_POINTER_REGNUM}, \
......@@ -1590,17 +1546,11 @@ extern char leaf_reg_remap[];
do { \
(OFFSET) = 0; \
if ((TO) == STACK_POINTER_REGNUM) \
{ \
/* Note, we always pretend that this is a leaf function \
because if it's not, there's no point in trying to \
eliminate the frame pointer. If it is a leaf \
function, we guessed right! */ \
if (TARGET_FLAT) \
(OFFSET) = \
sparc_flat_compute_frame_size (get_frame_size ()); \
else \
(OFFSET) = compute_frame_size (get_frame_size (), 1); \
} \
/* Note, we always pretend that this is a leaf function \
because if it's not, there's no point in trying to \
eliminate the frame pointer. If it is a leaf \
function, we guessed right! */ \
(OFFSET) = compute_frame_size (get_frame_size (), 1); \
(OFFSET) += SPARC_STACK_BIAS; \
} while (0)
......@@ -1622,29 +1572,18 @@ extern char leaf_reg_remap[];
/* Some subroutine macros specific to this machine.
When !TARGET_FPU, put float return values in the general registers,
since we don't have any fp registers. */
#define BASE_RETURN_VALUE_REG(MODE) \
(TARGET_ARCH64 \
? (TARGET_FPU && FLOAT_MODE_P (MODE) ? 32 : 8) \
: (TARGET_FPU && FLOAT_MODE_P (MODE) && (MODE) != TFmode ? 32 : 8))
#define BASE_RETURN_VALUE_REG(MODE) \
(TARGET_FPU && FLOAT_MODE_P (MODE) ? 32 : 8)
#define BASE_OUTGOING_VALUE_REG(MODE) \
(TARGET_ARCH64 \
? (TARGET_FPU && FLOAT_MODE_P (MODE) ? 32 \
: TARGET_FLAT ? 8 : 24) \
: (TARGET_FPU && FLOAT_MODE_P (MODE) && (MODE) != TFmode ? 32\
: (TARGET_FLAT ? 8 : 24)))
#define BASE_OUTGOING_VALUE_REG(MODE) \
(TARGET_FPU && FLOAT_MODE_P (MODE) ? 32 : 24)
#define BASE_PASSING_ARG_REG(MODE) \
(TARGET_ARCH64 \
? (TARGET_FPU && FLOAT_MODE_P (MODE) ? 32 : 8) \
: 8)
(TARGET_ARCH64 && TARGET_FPU && FLOAT_MODE_P (MODE) ? 32 : 8)
/* ??? FIXME -- seems wrong for v9 structure passing... */
#define BASE_INCOMING_ARG_REG(MODE) \
(TARGET_ARCH64 \
? (TARGET_FPU && FLOAT_MODE_P (MODE) ? 32 \
: TARGET_FLAT ? 8 : 24) \
: (TARGET_FLAT ? 8 : 24))
(TARGET_ARCH64 && TARGET_FPU && FLOAT_MODE_P (MODE) ? 32 : 24)
/* Define this macro if the target machine has "register windows". This
C expression returns the register number as seen by the called function
......@@ -1652,7 +1591,7 @@ extern char leaf_reg_remap[];
Return OUT if register number OUT is not an outbound register. */
#define INCOMING_REGNO(OUT) \
((TARGET_FLAT || (OUT) < 8 || (OUT) > 15) ? (OUT) : (OUT) + 16)
(((OUT) < 8 || (OUT) > 15) ? (OUT) : (OUT) + 16)
/* Define this macro if the target machine has "register windows". This
C expression returns the register number as seen by the calling function
......@@ -1660,14 +1599,14 @@ extern char leaf_reg_remap[];
Return IN if register number IN is not an inbound register. */
#define OUTGOING_REGNO(IN) \
((TARGET_FLAT || (IN) < 24 || (IN) > 31) ? (IN) : (IN) - 16)
(((IN) < 24 || (IN) > 31) ? (IN) : (IN) - 16)
/* Define this macro if the target machine has register windows. This
C expression returns true if the register is call-saved but is in the
register window. */
#define LOCAL_REGNO(REGNO) \
(TARGET_FLAT ? 0 : (REGNO) >= 16 && (REGNO) <= 31)
((REGNO) >= 16 && (REGNO) <= 31)
/* Define how to find the value returned by a function.
VALTYPE is the data type of the value (as a tree).
......@@ -1883,15 +1822,13 @@ do { \
(get_frame_size () != 0 \
|| current_function_calls_alloca || current_function_outgoing_args_size)
#define DELAY_SLOTS_FOR_EPILOGUE \
(TARGET_FLAT ? sparc_flat_epilogue_delay_slots () : 1)
#define DELAY_SLOTS_FOR_EPILOGUE 1
#define ELIGIBLE_FOR_EPILOGUE_DELAY(trial, slots_filled) \
(TARGET_FLAT ? sparc_flat_eligible_for_epilogue_delay (trial, slots_filled) \
: eligible_for_epilogue_delay (trial, slots_filled))
eligible_for_epilogue_delay (trial, slots_filled)
/* Define registers used by the epilogue and return instruction. */
#define EPILOGUE_USES(REGNO) \
(!TARGET_FLAT && REGNO == 31)
#define EPILOGUE_USES(REGNO) (REGNO == 31)
/* Length in units of the trampoline for entering a nested function. */
......@@ -1924,8 +1861,7 @@ do { \
/* Given an rtx for the address of a frame,
return an rtx for the address of the word in the frame
that holds the dynamic chain--the previous frame's address.
??? -mflat support? */
that holds the dynamic chain--the previous frame's address. */
#define DYNAMIC_CHAIN_ADDRESS(frame) \
plus_constant (frame, 14 * UNITS_PER_WORD + SPARC_STACK_BIAS)
......
gcc/config/sparc/sparc.md
......@@ -80,12 +80,12 @@
;; Attribute for the instruction set.
;; At present we only need to distinguish v9/!v9, but for clarity we
;; test TARGET_V8 too.
(define_attr "isa" "v6,v8,v9,sparclet"
(define_attr "isa" "v7,v8,v9,sparclet"
(const
(cond [(symbol_ref "TARGET_V9") (const_string "v9")
(symbol_ref "TARGET_V8") (const_string "v8")
(symbol_ref "TARGET_SPARCLET") (const_string "sparclet")]
(const_string "v6"))))
(const_string "v7"))))
;; Architecture size.
(define_attr "arch" "arch32bit,arch64bit"
......@@ -124,9 +124,6 @@
(define_attr "current_function_calls_alloca" "false,true"
(symbol_ref "current_function_calls_alloca != 0"))
(define_attr "flat" "false,true"
(symbol_ref "TARGET_FLAT != 0"))
;; Length (in # of insns).
(define_attr "length" ""
(cond [(eq_attr "type" "uncond_branch,call,sibcall")
......@@ -7724,7 +7721,6 @@
"jmp\t%a0%#"
[(set_attr "type" "uncond_branch")])
;; ??? Doesn't work with -mflat.
(define_expand "nonlocal_goto"
[(match_operand:SI 0 "general_operand" "")
(match_operand:SI 1 "general_operand" "")
......@@ -7839,7 +7835,7 @@
{
if (! current_function_calls_alloca)
return "";
if (! TARGET_V9 || TARGET_FLAT)
if (! TARGET_V9)
return "\tta\t3\n";
fputs ("\tflushw\n", asm_out_file);
if (flag_pic)
......@@ -7858,8 +7854,6 @@
(set (attr "length")
(cond [(eq_attr "current_function_calls_alloca" "false")
(const_int 0)
(eq_attr "flat" "true")
(const_int 1)
(eq_attr "isa" "!v9")
(const_int 1)
(eq_attr "pic" "true")
......@@ -8107,7 +8101,7 @@
(compare:CCX (match_dup 1) (const_int 0)))])]
"")
;; Return peepholes. These are generated by sparc_nonflat_function_epilogue
;; Return peepholes. These are generated by sparc_function_epilogue
;; who then immediately calls final_scan_insn.
(define_insn "*return_qi"
......@@ -8267,31 +8261,6 @@
[(set_attr "type" "multi")
(set_attr "length" "2")])
;; Now peepholes to do a call followed by a jump.
(define_peephole
[(parallel [(set (match_operand 0 "" "")
(call (mem:SI (match_operand:SI 1 "call_operand_address" "ps"))
(match_operand 2 "" "")))
(clobber (reg:SI 15))])
(set (pc) (label_ref (match_operand 3 "" "")))]
"short_branch (INSN_UID (insn), INSN_UID (operands[3]))
&& (USING_SJLJ_EXCEPTIONS || ! can_throw_internal (ins1))
&& sparc_cpu != PROCESSOR_ULTRASPARC
&& sparc_cpu != PROCESSOR_ULTRASPARC3"
"call\t%a1, %2\n\tadd\t%%o7, (%l3-.-4), %%o7")
(define_peephole
[(parallel [(call (mem:SI (match_operand:SI 0 "call_operand_address" "ps"))
(match_operand 1 "" ""))
(clobber (reg:SI 15))])
(set (pc) (label_ref (match_operand 2 "" "")))]
"short_branch (INSN_UID (insn), INSN_UID (operands[2]))
&& (USING_SJLJ_EXCEPTIONS || ! can_throw_internal (ins1))
&& sparc_cpu != PROCESSOR_ULTRASPARC
&& sparc_cpu != PROCESSOR_ULTRASPARC3"
"call\t%a0, %1\n\tadd\t%%o7, (%l2-.-4), %%o7")
;; ??? UltraSPARC-III note: A memory operation loading into the floating point register
;; ??? file, if it hits the prefetch cache, has a chance to dual-issue with other memory
;; ??? operations. With DFA we might be able to model this, but it requires a lot of
......@@ -8370,26 +8339,6 @@
load_pic_register ();
DONE;
})
;; We need to reload %l7 for -mflat -fpic,
;; otherwise %l7 should be preserved simply
;; by loading the function's register window
(define_expand "exception_receiver"
[(const_int 0)]
"TARGET_FLAT && flag_pic"
{
load_pic_register ();
DONE;
})
;; Likewise
(define_expand "builtin_setjmp_receiver"
[(label_ref (match_operand 0 "" ""))]
"TARGET_FLAT && flag_pic"
{
load_pic_register ();
DONE;
})
(define_insn "trap"
[(trap_if (const_int 1) (const_int 5))]
......
gcc/config/sparc/t-sparclite
......@@ -15,7 +15,7 @@ fp-bit.c: $(srcdir)/config/fp-bit.c
echo '#define US_SOFTWARE_GOFAST' >> fp-bit.c
cat $(srcdir)/config/fp-bit.c >> fp-bit.c
MULTILIB_OPTIONS = mfpu mflat
MULTILIB_OPTIONS = mfpu
MULTILIB_DIRNAMES =
MULTILIB_MATCHES = mfpu=mhard-float mfpu=mcpu?f934
......
gcc/doc/invoke.texi
......@@ -359,15 +359,12 @@ in the following sections.
-mcmodel=@var{code-model} @gol
-m32 -m64 -mapp-regs -mno-app-regs @gol
-mfaster-structs -mno-faster-structs @gol
-mflat -mno-flat -mfpu -mno-fpu @gol
-mhard-float -msoft-float @gol
-mfpu -mno-fpu -mhard-float -msoft-float @gol
-mhard-quad-float -msoft-quad-float @gol
-mimpure-text -mno-impure-text -mlittle-endian @gol
-mstack-bias -mno-stack-bias @gol
-munaligned-doubles -mno-unaligned-doubles @gol
-mv8plus -mno-v8plus -mvis -mno-vis @gol
-mcypress -mf930 -mf934 @gol
-msparclite -msupersparc -mv8}
-mv8plus -mno-v8plus -mvis -mno-vis}
@emph{ARM Options}
@gccoptlist{-mapcs-frame -mno-apcs-frame @gol
......@@ -6212,22 +6209,6 @@ emulates the effect of the instruction. Because of the trap handler overhead,
this is much slower than calling the ABI library routines. Thus the
@option{-msoft-quad-float} option is the default.
@item -mno-flat
@itemx -mflat
@opindex mno-flat
@opindex mflat
With @option{-mflat}, the compiler does not generate save/restore instructions
and will use a ``flat'' or single register window calling convention.
This model uses %i7 as the frame pointer and is compatible with the normal
register window model. Code from either may be intermixed.
The local registers and the input registers (0--5) are still treated as
``call saved'' registers and will be saved on the stack as necessary.
With @option{-mno-flat} (the default), the compiler emits save/restore
instructions (except for leaf functions) and is the normal mode of operation.
These options are deprecated and will be deleted in a future GCC release.
@item -mno-unaligned-doubles
@itemx -munaligned-doubles
@opindex mno-unaligned-doubles
......@@ -6270,26 +6251,6 @@ using @option{-mimpure-text}, you should compile all source code with
This option is only available on SunOS and Solaris.
@item -mv8
@itemx -msparclite
@opindex mv8
@opindex msparclite
These two options select variations on the SPARC architecture.
These options are deprecated and will be deleted in a future GCC release.
They have been replaced with @option{-mcpu=xxx}.
@item -mcypress
@itemx -msupersparc
@itemx -mf930
@itemx -mf934
@opindex mcypress
@opindex msupersparc
@opindex -mf930
@opindex -mf934
These four options select the processor for which the code is optimized.
These options are deprecated and will be deleted in a future GCC release.
They have been replaced with @option{-mcpu=xxx}.
@item -mcpu=@var{cpu_type}
@opindex mcpu
Set the instruction set, register set, and instruction scheduling parameters
......
gcc/testsuite/ChangeLog
2004-02-03 Eric Botcazou <ebotcazou@libertysurf.fr>
* gcc.dg/20020503-1.c: Remove -mflat dg-options.
2004-02-03 Paolo Bonzini <bonzini@gnu.org>
PR c/11658
......
gcc/testsuite/gcc.dg/20020503-1.c
......@@ -5,7 +5,6 @@
returned -1 for some registers (like %o0). */
/* { dg-do compile } */
/* { dg-options "-O2 -g" } */
/* { dg-options "-O2 -g -mflat" { target sparc*-*-* } } */
void foo (char *a, char *b, char *c, char *d)
{
......
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