Commit 5fd5d713 by DJ Delorie Committed by DJ Delorie

m32c-pragma.c (m32c_register_pragmas): Register the __far address space.

* config/m32c/m32c-pragma.c (m32c_register_pragmas): Register the
__far address space.
* config/m32c/m32c.h (ADDR_SPACE_FAR): New.  Add support for
"__far" address space for R8C and M16C processor variants.
* config/m32c/m32c.c (m32c_addr_space_legitimate_address_p): New.
(far_addr_space_p): New.
(encode_pattern_1): Add sign and zero extend support.
(m32c_hard_regno_nregs_1): Large pointers in A16 mode are SImode.
(m32c_extra_constraint_p2): Add SF constraint.
(m32c_legitimate_address_p): Support __far addresses.
(m32c_addr_space_pointer_mode): New.
(m32c_addr_space_address_mode): New.
(m32c_addr_space_legitimate_address_p): New.
(m32c_addr_space_legitimize_address): New.
(m32c_addr_space_subset_p): New.
(m32c_addr_space_convert): New.
(conversions): Add __far operand patterns.
(m32c_prepare_move): Force constants into registers for __far
moves.
(m32c_split_move): __far moves are always split.
* config/m32c/addsub.md (addsi3_1): Support SImode symbols.
* config/m32c/mov.md (mov<mode>_far_op1): New.
(mov<mode>_far_op2): New.
(movqi_op): Add __far (SF) support.
(movhi_op): Likewise.
(movsi_splittable): Split A1A0 also.

From-SVN: r165865
parent bf1a7f66
2010-10-22 DJ Delorie <dj@redhat.com>
* config/m32c/m32c-pragma.c (m32c_register_pragmas): Register the
__far address space.
* config/m32c/m32c.h (ADDR_SPACE_FAR): New. Add support for
"__far" address space for R8C and M16C processor variants.
* config/m32c/m32c.c (m32c_addr_space_legitimate_address_p): New.
(far_addr_space_p): New.
(encode_pattern_1): Add sign and zero extend support.
(m32c_hard_regno_nregs_1): Large pointers in A16 mode are SImode.
(m32c_extra_constraint_p2): Add SF constraint.
(m32c_legitimate_address_p): Support __far addresses.
(m32c_addr_space_pointer_mode): New.
(m32c_addr_space_address_mode): New.
(m32c_addr_space_legitimate_address_p): New.
(m32c_addr_space_legitimize_address): New.
(m32c_addr_space_subset_p): New.
(m32c_addr_space_convert): New.
(conversions): Add __far operand patterns.
(m32c_prepare_move): Force constants into registers for __far
moves.
(m32c_split_move): __far moves are always split.
* config/m32c/addsub.md (addsi3_1): Support SImode symbols.
* config/m32c/mov.md (mov<mode>_far_op1): New.
(mov<mode>_far_op2): New.
(movqi_op): Add __far (SF) support.
(movhi_op): Likewise.
(movsi_splittable): Split A1A0 also.
2010-10-22 Artjoms Sinkarovs <artyom.shinakroff@gmail.com>
Andrew Pinski <pinskia@gmail.com>
......@@ -93,9 +93,17 @@
case 1:
return \"add.w %X2,%h0\;adcf.w %H0\";
case 2:
output_asm_insn (\"add.w %X2,%h0\",operands);
operands[2]= GEN_INT (INTVAL (operands[2]) >> 16);
return \"adc.w %X2,%H0\";
if (GET_CODE (operands[2]) == SYMBOL_REF)
{
output_asm_insn (\"add.w #%%lo(%d2),%h0\",operands);
return \"adc.w #%%hi(%d2),%H0\";
}
else
{
output_asm_insn (\"add.w %X2,%h0\",operands);
operands[2]= GEN_INT (INTVAL (operands[2]) >> 16);
return \"adc.w %X2,%H0\";
}
case 3:
return \"add.w %h2,%h0\;adc.w %H2,%H0\";
case 4:
......
......@@ -131,4 +131,13 @@ m32c_register_pragmas (void)
c_register_pragma ("GCC", "memregs", m32c_pragma_memregs);
c_register_pragma (NULL, "ADDRESS", m32c_pragma_address);
c_register_pragma (NULL, "address", m32c_pragma_address);
/* R8C and M16C have 16-bit pointers in a 20-bit address zpace.
M32C has 24-bit pointers in a 24-bit address space, so does not
need far pointers, but we accept the qualifier anyway, as a
no-op. */
if (TARGET_A16)
c_register_addr_space ("__far", ADDR_SPACE_FAR);
else
c_register_addr_space ("__far", ADDR_SPACE_GENERIC);
}
......@@ -567,6 +567,10 @@ typedef struct m32c_cumulative_args
#define LEGITIMATE_CONSTANT_P(X) m32c_legitimate_constant_p (X)
/* Address spaces. */
#define ADDR_SPACE_FAR 1
/* Condition Code Status */
#define REVERSIBLE_CC_MODE(MODE) 1
......
......@@ -28,22 +28,45 @@
;; example is code like this: a = *b where both a and b are spilled to
;; the stack.
(define_insn "mov<mode>_far_op1"
[(set (match_operand:QHI 0 "register_operand" "=Rhi")
(mem:QHI (plus:SI (sign_extend:SI (match_operand:HI 1 "register_operand" "Ra0"))
(match_operand 2 "immediate_operand" "si"))))
]
""
"lde.<bwl>\t%D2[%1],%0"
[(set_attr "flags" "sz")]
)
(define_insn "mov<mode>_far_op2"
[(set (mem:QHI (plus:SI (sign_extend:SI (match_operand:HI 0 "register_operand" "Ra0"))
(match_operand 1 "immediate_operand" "si")))
(match_operand:QHI 2 "register_operand"
"=Rhi"))
]
""
"ste.<bwl>\t%2,%D1[%0]"
[(set_attr "flags" "sz")]
)
;; Match push/pop before mov.b for passing char as arg,
;; e.g. stdlib/efgcvt.c.
(define_insn "movqi_op"
[(set (match_operand:QI 0 "m32c_nonimmediate_operand"
"=Rqi*Rmm, <, RqiSd*Rmm, SdSs, Rqi*Rmm, Sd")
"=SF,Rhi*Rmm, Rqi*Rmm, <, RqiSd*Rmm, SdSs, Rqi*Rmm, Sd")
(match_operand:QI 1 "m32c_any_operand"
"iRqi*Rmm, iRqiSd*Rmm, >, Rqi*Rmm, SdSs, i"))]
"Rhi*Rmm,SF, iRqi*Rmm, iRqiSd*Rmm, >, Rqi*Rmm, SdSs, i"))]
"m32c_mov_ok (operands, QImode)"
"@
lde.b\t%1,%0
ste.b\t%1,%0
mov.b\t%1,%0
push.b\t%1
pop.b\t%0
mov.b\t%1,%0
mov.b\t%1,%0
mov.b\t%1,%0"
[(set_attr "flags" "sz,*,*,sz,sz,sz")]
[(set_attr "flags" "sz,sz,sz,*,*,sz,sz,sz")]
)
(define_expand "movqi"
......@@ -56,11 +79,13 @@
(define_insn "movhi_op"
[(set (match_operand:HI 0 "m32c_nonimmediate_operand"
"=Rhi*Rmm, Sd, SdSs, *Rcr, RhiSd*Rmm, <, RhiSd*Rmm, <, *Rcr")
"=SF,Rhi*Rmm, Rhi*Rmm, Sd, SdSs, *Rcr, RhiSd*Rmm, <, RhiSd*Rmm, <, *Rcr")
(match_operand:HI 1 "m32c_any_operand"
"iRhi*RmmSdSs, i, Rhi*Rmm, RhiSd*Rmm, *Rcr, iRhiSd*Rmm, >, *Rcr, >"))]
" Rhi*Rmm,SF, iRhi*RmmSdSs, i, Rhi*Rmm, RhiSd*Rmm, *Rcr, iRhiSd*Rmm, >, *Rcr, >"))]
"m32c_mov_ok (operands, HImode)"
"@
ste.w\t%1,%0
lde.w\t%1,%0
mov.w\t%1,%0
mov.w\t%1,%0
mov.w\t%1,%0
......@@ -70,7 +95,7 @@
pop.w\t%0
pushc\t%1
popc\t%0"
[(set_attr "flags" "sz,sz,sz,n,n,n,n,n,n")]
[(set_attr "flags" "sz,sz,sz,sz,sz,n,n,n,n,n,n")]
)
(define_expand "movhi"
......@@ -176,11 +201,11 @@
; All SI moves are split if TARGET_A16
(define_insn_and_split "movsi_splittable"
[(set (match_operand:SI 0 "m32c_nonimmediate_operand" "=Rsi<*Rmm,RsiSd*Rmm,Ss")
(match_operand:SI 1 "m32c_any_operand" "iRsiSd*Rmm,iRsi>*Rmm,Rsi*Rmm"))]
[(set (match_operand:SI 0 "m32c_nonimmediate_operand" "=RsiRaa<*Rmm, RsiRaaSd*Rmm, Ss")
(match_operand:SI 1 "m32c_any_operand" "iRsiRaaSd*Rmm, iRsiRaa>*Rmm, RsiRaa*Rmm"))]
"TARGET_A16"
"#"
"TARGET_A16 && reload_completed"
"TARGET_A16"
[(pc)]
"m32c_split_move (operands, SImode, 1); DONE;"
)
......
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