r10k-cache-barrier-10.c: Make a branch-likely instruction more likely.

gcc/testsuite/
	* gcc.target/mips/r10k-cache-barrier-10.c: Make a branch-likely
	instruction more likely.

From-SVN: r194705

gcc/testsuite/ChangeLog

 2012-12-23  Richard Sandiford  <rdsandiford@googlemail.com>
 
+	* gcc.target/mips/r10k-cache-barrier-10.c: Make a branch-likely
+	instruction more likely.
+
+2012-12-23  Richard Sandiford  <rdsandiford@googlemail.com>
+
 	* gcc.target/mips/pr55315.c: Cast to long rather than int.
 
 2012-12-22  Tobias Burnus  <burnus@net-b.de>

gcc/testsuite/gcc.target/mips/r10k-cache-barrier-10.c

@@ -9,6 +9,12 @@ unsigned char *bar (int);
 NOMIPS16 void
 foo (unsigned char *n)
 {
+  /* n starts in $4, but will be in $2 after the call to bar.
+     Encourage it to be in $2 on entry to the loop as well,
+     by doing some computation on it beforehand (D?ADDIU $2,$4,4).
+     dbr_schedule should then pull the *n load (L[WD] ...,0($2))
+     into the delay slot.  */
+  n += 4;
   do
     n = bar (*n + 1);
   while (n);