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riscv-gcc-1
Commit 5f59ecb7 by David Edelsohn
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[multiple changes] 

Mon Aug  2 16:15:57 1999  David Edelsohn  <edelsohn@gnu.org>

	* rs6000/aix43.h (SUBTARGET_SWITCHES): Use -m64 and -m32 instead of
	-maix64 and -maix32.
	(ASM_SPEC, ASM_CPU_SPEC, CPP_SPEC, CPP_CPU_SPEC, LIB_SPEC,
	LINK_SPEC): Change appropriately.
	* rs6000/rs6000.c (short_cint_operand): Use CONST_OK_FOR_LETTER_P.
	(u_short_cint_operand): Likewise.
	* rs6000/rs6000.md (movdi splitters): Add TARGET_POWERPC64 support
	for 64-bit hosts.
	* rs6000/t-aix43 (MULTILIB): Change to -m64.

	* invoke.texi (RS/6000 Submodel): Document 64-bit processor options.

Mon Aug  2 16:15:57 1999  Geoff Keating  <geoffk@cygnus.com>

	* rs6000/rs6000.c (num_insns_constant_wide): Correct
	for type promotion.
	(add_operand): Get test correct for 64-bit HOST_WIDE_INT.
	(non_add_cint_operand): Likewise.
	(logical_operand): Likewise.
	(non_logical_cint_operand): Likewise.
	(print_operand): Correct printf()s for 64-bit HOST_WIDE_INT.
	(print_operand_address): Correct printf() for 64-bit HOST_WIDE_INT.
	(rs6000_select_rtx_section): Suppress warning.
	(small_data_operand): Suppress warning.
	(rs6000_got_register): Suppress warning.
	* rs6000/rs6000.md (andsi3): HOST_WIDE_INT is a signed
	type, so `J' is generally the wrong constraint for a SImode value;
	use `L' instead.
	(andsi3_internal2): Likewise.
	(andsi3_internal3): Likewise.
	(iorsi3_internal1): Likewise.
	(xorsi3_internal1): Likewise.
	(movsi): Likewise.
	(movsf_softfloat): Likewise.
	(scc insns): Likewise.
	(movsi+2): Preserve sign bits of SImode constant.
	(floatsidf2_internal+1): Sign-extend SImode constant correctly.
	(movdf+1): Sign-extend properly.
	(movdi_32+1): Sign-extend properly.
	(scc insns): Sign-extend properly.

	* md.texi (RS/6000 EXTRA_CONSTRAINTS): Update documentation for J,
	K, L, and T.

From-SVN: r28406
parent 981a828e
Showing with 138 additions and 96 deletions
gcc/ChangeLog
Mon Aug 2 16:15:57 1999 David Edelsohn <edelsohn@gnu.org>
* rs6000/aix43.h (SUBTARGET_SWITCHES): Use -m64 and -m32 instead of
-maix64 and -maix32.
(ASM_SPEC, ASM_CPU_SPEC, CPP_SPEC, CPP_CPU_SPEC, LIB_SPEC,
LINK_SPEC): Change appropriately.
* rs6000/rs6000.c (short_cint_operand): Use CONST_OK_FOR_LETTER_P.
(u_short_cint_operand): Likewise.
* rs6000/rs6000.md (movdi splitters): Add TARGET_POWERPC64 support
for 64-bit hosts.
* rs6000/t-aix43 (MULTILIB): Change to -m64.
* invoke.texi (RS/6000 Submodel): Document 64-bit processor options.
Mon Aug 2 16:15:57 1999 Geoff Keating <geoffk@cygnus.com>
* rs6000/rs6000.c (num_insns_constant_wide): Correct
for type promotion.
(add_operand): Get test correct for 64-bit HOST_WIDE_INT.
(non_add_cint_operand): Likewise.
(logical_operand): Likewise.
(non_logical_cint_operand): Likewise.
(print_operand): Correct printf()s for 64-bit HOST_WIDE_INT.
(print_operand_address): Correct printf() for 64-bit HOST_WIDE_INT.
(rs6000_select_rtx_section): Suppress warning.
(small_data_operand): Suppress warning.
(rs6000_got_register): Suppress warning.
* rs6000/rs6000.md (andsi3): HOST_WIDE_INT is a signed
type, so `J' is generally the wrong constraint for a SImode value;
use `L' instead.
(andsi3_internal2): Likewise.
(andsi3_internal3): Likewise.
(iorsi3_internal1): Likewise.
(xorsi3_internal1): Likewise.
(movsi): Likewise.
(movsf_softfloat): Likewise.
(scc insns): Likewise.
(movsi+2): Preserve sign bits of SImode constant.
(floatsidf2_internal+1): Sign-extend SImode constant correctly.
(movdf+1): Sign-extend properly.
(movdi_32+1): Sign-extend properly.
(scc insns): Sign-extend properly.
* md.texi (RS/6000 EXTRA_CONSTRAINTS): Update documentation for J,
K, L, and T.
1999-08-02 Richard Henderson <rth@cygnus.com>
* alpha.c (override_options): Move ev6 alpha_tp frobbing out of
......
gcc/config/rs6000/aix43.h
......@@ -26,8 +26,8 @@ Boston, MA 02111-1307, USA. */
#define TARGET_XL_CALL (target_flags & MASK_XL_CALL)
#undef SUBTARGET_SWITCHES
#define SUBTARGET_SWITCHES \
{"aix64", MASK_64BIT | MASK_POWERPC64 | MASK_POWERPC}, \
{"aix32", - (MASK_64BIT | MASK_POWERPC64)}, \
{"64", MASK_64BIT | MASK_POWERPC64 | MASK_POWERPC}, \
{"32", - (MASK_64BIT | MASK_POWERPC64)}, \
{"xl-call", MASK_XL_CALL}, \
{"no-xl-call", - MASK_XL_CALL}, \
{"threads", 0}, \
......@@ -48,25 +48,25 @@ do { \
if (TARGET_64BIT && (target_flags & NON_POWERPC_MASKS)) \
{ \
target_flags &= ~NON_POWERPC_MASKS; \
warning ("-maix64 and POWER architecture are incompatible."); \
warning ("-m64 and POWER architecture are incompatible."); \
} \
if (TARGET_64BIT && ! (target_flags & MASK_POWERPC64)) \
{ \
target_flags |= MASK_POWERPC64; \
warning ("-maix64 requires PowerPC64 architecture remain enabled."); \
warning ("-m64 requires PowerPC64 architecture remain enabled."); \
} \
} while (0);
#include "rs6000/rs6000.h"
#undef ASM_SPEC
#define ASM_SPEC "-u %{maix64:-a64 -mppc64} %(asm_cpu)"
#define ASM_SPEC "-u %{m64:-a64 -mppc64} %(asm_cpu)"
/* Common ASM definitions used by ASM_SPEC amonst the various targets
for handling -mcpu=xxx switches. */
#undef ASM_CPU_SPEC
#define ASM_CPU_SPEC \
"%{!mcpu*: %{!maix64: \
"%{!mcpu*: %{!m64: \
%{mpower: %{!mpower2: -mpwr}} \
%{mpower2: -mpwr2} \
%{mpowerpc*: %{!mpowerpc64: -mppc}} \
......@@ -104,7 +104,7 @@ do { \
#undef CPP_SPEC
#define CPP_SPEC "%{posix: -D_POSIX_SOURCE}\
%{maix64: -D__64BIT__ -D_ARCH_PPC}\
%{m64: -D__64BIT__ -D_ARCH_PPC}\
%{mpe: -I/usr/lpp/ppe.poe/include}\
%{mthreads: -D_THREAD_SAFE}\
%(cpp_cpu)"
......@@ -113,7 +113,7 @@ do { \
for handling -mcpu=xxx switches. */
#undef CPP_CPU_SPEC
#define CPP_CPU_SPEC \
"%{!mcpu*: %{!maix64: \
"%{!mcpu*: %{!m64: \
%{mpower: %{!mpower2: -D_ARCH_PWR}} \
%{mpower2: -D_ARCH_PWR2} \
%{mpowerpc*: -D_ARCH_PPC} \
......@@ -182,15 +182,15 @@ do { \
#undef LIB_SPEC
#define LIB_SPEC "%{pg:-L/lib/profiled -L/usr/lib/profiled}\
%{p:-L/lib/profiled -L/usr/lib/profiled}\
%{!maix64:%{!shared:%{g*:-lg}}}\
%{!m64:%{!shared:%{g*:-lg}}}\
%{mpe:-L/usr/lpp/ppe.poe/lib -lmpi -lvtd}\
%{mthreads:-L/usr/lib/threads -lpthreads -lc_r /usr/lib/libc.a}\
%{!mthreads:-lc}"
#undef LINK_SPEC
#define LINK_SPEC "-bpT:0x10000000 -bpD:0x20000000 %{!r:-btextro} -bnodelcsect\
%{static:-bnso %(link_syscalls) } %{!maix64:%{!shared:%{g*: %(link_libg) }}}\
%{shared:-bM:SRE %{!e:-bnoentry}} %{maix64:-b64}"
%{static:-bnso %(link_syscalls) } %{!m64:%{!shared:%{g*: %(link_libg) }}}\
%{shared:-bM:SRE %{!e:-bnoentry}} %{m64:-b64}"
#undef STARTFILE_SPEC
#define STARTFILE_SPEC "%{!shared:\
......@@ -198,8 +198,8 @@ do { \
%{!pg:%{p:/usr/lpp/ppe.poe/lib/mcrt0.o}\
%{!p:/usr/lpp/ppe.poe/lib/crt0.o}}}\
%{!mpe:\
%{maix64:%{pg:gcrt0_64%O%s}%{!pg:%{p:mcrt0_64%O%s}%{!p:crt0_64%O%s}}}\
%{!maix64:\
%{m64:%{pg:gcrt0_64%O%s}%{!pg:%{p:mcrt0_64%O%s}%{!p:crt0_64%O%s}}}\
%{!m64:\
%{mthreads:%{pg:gcrt0_r%O%s}%{!pg:%{p:mcrt0_r%O%s}%{!p:crt0_r%O%s}}}\
%{!mthreads:%{pg:gcrt0%O%s}%{!pg:%{p:mcrt0%O%s}%{!p:crt0%O%s}}}}}}"
......
gcc/config/rs6000/rs6000.c
......@@ -515,8 +515,8 @@ short_cint_operand (op, mode)
register rtx op;
enum machine_mode mode ATTRIBUTE_UNUSED;
{
return ((GET_CODE (op) == CONST_INT
&& (unsigned HOST_WIDE_INT) (INTVAL (op) + 0x8000) < 0x10000));
return (GET_CODE (op) == CONST_INT
&& CONST_OK_FOR_LETTER_P (INTVAL (op), 'I'));
}
/* Similar for a unsigned D field. */
......@@ -527,7 +527,7 @@ u_short_cint_operand (op, mode)
enum machine_mode mode ATTRIBUTE_UNUSED;
{
return (GET_CODE (op) == CONST_INT
&& (INTVAL (op) & (~ (HOST_WIDE_INT) 0xffff)) == 0);
&& CONST_OK_FOR_LETTER_P (INTVAL (op), 'K'));
}
/* Return 1 if OP is a CONST_INT that cannot fit in a signed D field. */
......@@ -663,19 +663,14 @@ num_insns_constant_wide (value)
HOST_WIDE_INT value;
{
/* signed constant loadable with {cal|addi} */
if (((unsigned HOST_WIDE_INT)value + 0x8000) < 0x10000)
return 1;
#if HOST_BITS_PER_WIDE_INT == 32
/* constant loadable with {cau|addis} */
else if ((value & 0xffff) == 0)
if (CONST_OK_FOR_LETTER_P (value, 'I'))
return 1;
#else
/* constant loadable with {cau|addis} */
else if ((value & 0xffff) == 0 && (value & ~0xffffffff) == 0)
else if (CONST_OK_FOR_LETTER_P (value, 'L'))
return 1;
#if HOST_BITS_PER_WIDE_INT == 64
else if (TARGET_64BIT)
{
HOST_WIDE_INT low = value & 0xffffffff;
......@@ -880,7 +875,7 @@ mem_or_easy_const_operand (op, mode)
}
/* Return 1 if the operand is either a non-special register or an item
that can be used as the operand of an SI add insn. */
that can be used as the operand of a `mode' add insn. */
int
add_operand (op, mode)
......@@ -889,7 +884,7 @@ add_operand (op, mode)
{
return (reg_or_short_operand (op, mode)
|| (GET_CODE (op) == CONST_INT
&& (INTVAL (op) & (~ (HOST_WIDE_INT) 0xffff0000)) == 0));
&& CONST_OK_FOR_LETTER_P (INTVAL(op), 'L')));
}
/* Return 1 if OP is a constant but not a valid add_operand. */
......@@ -901,7 +896,7 @@ non_add_cint_operand (op, mode)
{
return (GET_CODE (op) == CONST_INT
&& (unsigned HOST_WIDE_INT) (INTVAL (op) + 0x8000) >= 0x10000
&& (INTVAL (op) & (~ (HOST_WIDE_INT) 0xffff0000)) != 0);
&& ! CONST_OK_FOR_LETTER_P (INTVAL(op), 'L'));
}
/* Return 1 if the operand is a non-special register or a constant that
......@@ -914,8 +909,10 @@ logical_operand (op, mode)
{
return (gpc_reg_operand (op, mode)
|| (GET_CODE (op) == CONST_INT
&& ((INTVAL (op) & (~ (HOST_WIDE_INT) 0xffff)) == 0
|| (INTVAL (op) & (~ (HOST_WIDE_INT) 0xffff0000)) == 0)));
&& ((INTVAL (op) & GET_MODE_MASK (mode)
& (~ (HOST_WIDE_INT) 0xffff)) == 0
|| (INTVAL (op) & GET_MODE_MASK (mode)
& (~ (HOST_WIDE_INT) 0xffff0000)) == 0)));
}
/* Return 1 if C is a constant that is not a logical operand (as
......@@ -924,11 +921,13 @@ logical_operand (op, mode)
int
non_logical_cint_operand (op, mode)
register rtx op;
enum machine_mode mode ATTRIBUTE_UNUSED;
enum machine_mode mode;
{
return (GET_CODE (op) == CONST_INT
&& (INTVAL (op) & (~ (HOST_WIDE_INT) 0xffff)) != 0
&& (INTVAL (op) & (~ (HOST_WIDE_INT) 0xffff0000)) != 0);
&& (INTVAL (op) & GET_MODE_MASK (mode) &
(~ (HOST_WIDE_INT) 0xffff)) != 0
&& (INTVAL (op) & GET_MODE_MASK (mode) &
(~ (HOST_WIDE_INT) 0xffff0000)) != 0);
}
/* Return 1 if C is a constant that can be encoded in a 32-bit mask on the
......@@ -1198,7 +1197,7 @@ small_data_operand (op, mode)
enum machine_mode mode ATTRIBUTE_UNUSED;
{
#if TARGET_ELF
rtx sym_ref, const_part;
rtx sym_ref;
if (rs6000_sdata == SDATA_NONE || rs6000_sdata == SDATA_DATA)
return 0;
......@@ -2474,7 +2473,7 @@ ccr_bit (op, scc_p)
struct rtx_def *
rs6000_got_register (value)
rtx value;
rtx value ATTRIBUTE_UNUSED;
{
/* The second flow pass currently (June 1999) can't update regs_ever_live
without disturbing other parts of the compiler, so update it here to
......@@ -2627,7 +2626,7 @@ print_operand (file, x, code)
if (! INT_P (x))
output_operand_lossage ("invalid %%b value");
fprintf (file, "%d", INT_LOWPART (x) & 0xffff);
fprintf (file, HOST_WIDE_INT_PRINT_DEC, INT_LOWPART (x) & 0xffff);
return;
case 'B':
......@@ -2713,7 +2712,7 @@ print_operand (file, x, code)
/* If constant, output low-order five bits. Otherwise,
write normally. */
if (INT_P (x))
fprintf (file, "%d", INT_LOWPART (x) & 31);
fprintf (file, HOST_WIDE_INT_PRINT_DEC, INT_LOWPART (x) & 31);
else
print_operand (file, x, 0);
return;
......@@ -2722,7 +2721,7 @@ print_operand (file, x, code)
/* If constant, output low-order six bits. Otherwise,
write normally. */
if (INT_P (x))
fprintf (file, "%d", INT_LOWPART (x) & 63);
fprintf (file, HOST_WIDE_INT_PRINT_DEC, INT_LOWPART (x) & 63);
else
print_operand (file, x, 0);
return;
......@@ -2759,7 +2758,7 @@ print_operand (file, x, code)
if (! INT_P (x))
output_operand_lossage ("invalid %%k value");
fprintf (file, "%d", ~ INT_LOWPART (x));
fprintf (file, HOST_WIDE_INT_PRINT_DEC, ~ INT_LOWPART (x));
return;
case 'L':
......@@ -2903,7 +2902,7 @@ print_operand (file, x, code)
if (! INT_P (x))
output_operand_lossage ("invalid %%s value");
fprintf (file, "%d", (32 - INT_LOWPART (x)) & 31);
fprintf (file, HOST_WIDE_INT_PRINT_DEC, (32 - INT_LOWPART (x)) & 31);
return;
case 'S':
......@@ -3006,7 +3005,8 @@ print_operand (file, x, code)
if (! INT_P (x))
output_operand_lossage ("invalid %%u value");
fprintf (file, "0x%x", (INT_LOWPART (x) >> 16) & 0xffff);
fprintf (file, HOST_WIDE_INT_PRINT_HEX,
(INT_LOWPART (x) >> 16) & 0xffff);
return;
case 'v':
......@@ -3076,7 +3076,8 @@ print_operand (file, x, code)
/* If constant, low-order 16 bits of constant, signed. Otherwise, write
normally. */
if (INT_P (x))
fprintf (file, "%d", ((INT_LOWPART (x) & 0xffff) ^ 0x8000) - 0x8000);
fprintf (file, HOST_WIDE_INT_PRINT_DEC,
((INT_LOWPART (x) & 0xffff) ^ 0x8000) - 0x8000);
else
print_operand (file, x, 0);
return;
......@@ -3085,7 +3086,7 @@ print_operand (file, x, code)
/* If constant, low-order 16 bits of constant, unsigned.
Otherwise, write normally. */
if (INT_P (x))
fprintf (file, "%d", INT_LOWPART (x) & 0xffff);
fprintf (file, HOST_WIDE_INT_PRINT_DEC, INT_LOWPART (x) & 0xffff);
else
print_operand (file, x, 0);
return;
......@@ -3221,7 +3222,10 @@ print_operand_address (file, x)
reg_names[ REGNO (XEXP (x, 1)) ]);
}
else if (GET_CODE (x) == PLUS && GET_CODE (XEXP (x, 1)) == CONST_INT)
fprintf (file, "%d(%s)", INTVAL (XEXP (x, 1)), reg_names[ REGNO (XEXP (x, 0)) ]);
{
fprintf (file, HOST_WIDE_INT_PRINT_DEC, INTVAL (XEXP (x, 1)));
fprintf (file, "(%s)", reg_names[ REGNO (XEXP (x, 0)) ]);
}
#if TARGET_ELF
else if (GET_CODE (x) == LO_SUM && GET_CODE (XEXP (x, 0)) == REG
&& CONSTANT_P (XEXP (x, 1)))
......@@ -5649,7 +5653,7 @@ rs6000_longcall_ref (call_ref)
void
rs6000_select_rtx_section (mode, x)
enum machine_mode mode;
enum machine_mode mode ATTRIBUTE_UNUSED;
rtx x;
{
if (ASM_OUTPUT_SPECIAL_POOL_ENTRY_P (x))
......@@ -5761,17 +5765,17 @@ rs6000_encode_section_info (decl)
if ((size > 0 && size <= g_switch_value)
|| (name
&& ((len == sizeof (".sdata")-1
&& ((len == sizeof (".sdata") - 1
&& strcmp (name, ".sdata") == 0)
|| (len == sizeof (".sdata2")-1
|| (len == sizeof (".sdata2") - 1
&& strcmp (name, ".sdata2") == 0)
|| (len == sizeof (".sbss")-1
|| (len == sizeof (".sbss") - 1
&& strcmp (name, ".sbss") == 0)
|| (len == sizeof (".sbss2")-1
|| (len == sizeof (".sbss2") - 1
&& strcmp (name, ".sbss2") == 0)
|| (len == sizeof (".PPC.EMB.sdata0")-1
|| (len == sizeof (".PPC.EMB.sdata0") - 1
&& strcmp (name, ".PPC.EMB.sdata0") == 0)
|| (len == sizeof (".PPC.EMB.sbss0")-1
|| (len == sizeof (".PPC.EMB.sbss0") - 1
&& strcmp (name, ".PPC.EMB.sbss0") == 0))))
{
rtx sym_ref = XEXP (DECL_RTL (decl), 0);
......
gcc/config/rs6000/t-aix43
......@@ -17,13 +17,12 @@ fp-bit.c: $(srcdir)/config/fp-bit.c
# different processor models
MULTILIB_OPTIONS = msoft-float \
mcpu=common/mcpu=power/mcpu=powerpc/maix64
mcpu=common/mcpu=power/mcpu=powerpc/m64
MULTILIB_DIRNAMES = soft-float \
common power powerpc aix64
common power powerpc ppc64
MULTILIB_MATCHES = msoft-float=mcpu?403 \
maix64=maix64 \
mcpu?power=mpower \
mcpu?power=mrios1 \
mcpu?power=mcpu?rios1 \
......@@ -32,12 +31,15 @@ MULTILIB_MATCHES = msoft-float=mcpu?403 \
mcpu?power=mpower2 \
mcpu?power=mrios2 \
mcpu?power=mcpu=rios2 \
mcpu?powerpc=mcpu?rs64a \
mcpu?powerpc=mcpu?601 \
mcpu?powerpc=mcpu?602 \
mcpu?powerpc=mcpu?603 \
mcpu?powerpc=mcpu?603e \
mcpu?powerpc=mcpu?604 \
mcpu?powerpc=mcpu?620 \
mcpu?powerpc=mcpu?630 \
mcpu?powerpc=mcpu?750 \
mcpu?powerpc=mcpu?403 \
mcpu?powerpc=mpowerpc \
mcpu?powerpc=mpowerpc-gpopt \
......
gcc/invoke.texi
......@@ -307,12 +307,12 @@ in the following sections.
-mcpu=@var{cpu type}
-mtune=@var{cpu type}
-mpower -mno-power -mpower2 -mno-power2
-mpowerpc -mno-powerpc
-mpowerpc -mpowerpc64 -mno-powerpc
-mpowerpc-gpopt -mno-powerpc-gpopt
-mpowerpc-gfxopt -mno-powerpc-gfxopt
-mnew-mnemonics -mno-new-mnemonics
-mfull-toc -mminimal-toc -mno-fop-in-toc -mno-sum-in-toc
-maix64 -maix32 -mxl-call -mno-xl-call -mthreads -mpe
-m64 -m32 -mxl-call -mno-xl-call -mthreads -mpe
-msoft-float -mhard-float -mmultiple -mno-multiple
-mstring -mno-string -mupdate -mno-update
-mfused-madd -mno-fused-madd -mbit-align -mno-bit-align
......@@ -4854,49 +4854,34 @@ should normally not specify either @samp{-mnew-mnemonics} or
@kindex -mcpu
Set architecture type, register usage, choice of mnemonics, and
instruction scheduling parameters for machine type @var{cpu_type}.
Supported values for @var{cpu_type} are @samp{rs6000}, @samp{rios1},
@samp{rios2}, @samp{rsc}, @samp{601}, @samp{602}, @samp{603},
@samp{603e}, @samp{604}, @samp{604e}, @samp{620}, @samp{740},
@samp{750}, @samp{power}, @samp{power2}, @samp{powerpc}, @samp{403},
@samp{505}, @samp{801}, @samp{821}, @samp{823}, and @samp{860} and
@samp{common}. @samp{-mcpu=power}, @samp{-mcpu=power2}, and
@samp{-mcpu=powerpc} specify generic POWER, POWER2 and pure PowerPC
(i.e., not MPC601) architecture machine types, with an appropriate,
Supported values for @var{cpu_type} are @samp{rios}, @samp{rios1},
@samp{rsc}, @samp{rios2}, @samp{rs64a}, @samp{601}, @samp{602},
@samp{603}, @samp{603e}, @samp{604}, @samp{604e}, @samp{620},
@samp{630}, @samp{740}, @samp{750}, @samp{power}, @samp{power2},
@samp{powerpc}, @samp{403}, @samp{505}, @samp{801}, @samp{821},
@samp{823}, and @samp{860} and @samp{common}. @samp{-mcpu=power},
@samp{-mcpu=power2}, @samp{-mcpu=powerpc}, and @samp{-mcpu=powerpc64}
specify generic POWER, POWER2, pure 32-bit PowerPC (i.e., not MPC601),
and 64-bit PowerPC architecture machine types, with an appropriate,
generic processor model assumed for scheduling purposes.@refill
@c overfull hbox here --bob 22 jul96
@c original text between ignore ... end ignore
@ignore
Specifying any of the @samp{-mcpu=rios1}, @samp{-mcpu=rios2},
@samp{-mcpu=rsc}, @samp{-mcpu=power}, or @samp{-mcpu=power2} options
enables the @samp{-mpower} option and disables the @samp{-mpowerpc}
option; @samp{-mcpu=601} enables both the @samp{-mpower} and
@samp{-mpowerpc} options; all of @samp{-mcpu=602}, @samp{-mcpu=603},
@samp{-mcpu=603e}, @samp{-mcpu=604}, @samp{-mcpu=604e},
@samp{-mcpu=620}, @samp{-mcpu=403}, @samp{-mcpu=505}, @samp{-mcpu=801},
@samp{-mcpu=821}, @samp{-mcpu=823}, @samp{-mcpu=860} and
@samp{-mcpu=powerpc} enable the @samp{-mpowerpc} option and disable the
@samp{-mpower} option; @samp{-mcpu=common} disables both the
@samp{-mpower} and @samp{-mpowerpc} options.@refill
@end ignore
@c changed paragraph
Specifying any of the following options:
@samp{-mcpu=rios1}, @samp{-mcpu=rios2}, @samp{-mcpu=rsc},
@samp{-mcpu=power}, or @samp{-mcpu=power2}
enables the @samp{-mpower} option and disables the @samp{-mpowerpc} option;
@samp{-mcpu=601} enables both the @samp{-mpower} and @samp{-mpowerpc} options.
All of @samp{-mcpu=602}, @samp{-mcpu=603}, @samp{-mcpu=603e},
@samp{-mcpu=604}, @samp{-mcpu=620},
All of @samp{-mcpu=rs64a}, @samp{-mcpu=602}, @samp{-mcpu=603},
@samp{-mcpu=603e}, @samp{-mcpu=604}, @samp{-mcpu=620}, @samp{-mcpu=630},
@samp{-mcpu=740}, and @samp{-mcpu=750}
enable the @samp{-mpowerpc} option and disable the @samp{-mpower} option.
Exactly similarly, all of @samp{-mcpu=403},
@samp{-mcpu=505}, @samp{-mcpu=821}, @samp{-mcpu=860} and @samp{-mcpu=powerpc}
enable the @samp{-mpowerpc} option and disable the @samp{-mpower} option.
@samp{-mcpu=common} disables both the
@samp{-mpower} and @samp{-mpowerpc} options.@refill
@c end changes to prevent overfull hboxes
AIX versions 4 or greater selects @samp{-mcpu=common} by default, so
that code will operate on all members of the RS/6000 and PowerPC
that code will operate on all members of the RS/6000 POWER and PowerPC
families. In that case, GNU CC will use only the instructions in the
common subset of both architectures plus some special AIX common-mode
calls, and will not use the MQ register. GNU CC assumes a generic
......@@ -4906,8 +4891,9 @@ Specifying any of the options @samp{-mcpu=rios1}, @samp{-mcpu=rios2},
@samp{-mcpu=rsc}, @samp{-mcpu=power}, or @samp{-mcpu=power2} also
disables the @samp{new-mnemonics} option. Specifying @samp{-mcpu=601},
@samp{-mcpu=602}, @samp{-mcpu=603}, @samp{-mcpu=603e}, @samp{-mcpu=604},
@samp{620}, @samp{403}, or @samp{-mcpu=powerpc} also enables the
@samp{new-mnemonics} option.@refill
@samp{-mcpu=620}, @samp{-mcpu=630}, @samp{-mcpu=403}, @samp{-mcpu=505},
@samp{-mcpu=821}, @samp{-mcpu=860} or @samp{-mcpu=powerpc} also enables
the @samp{new-mnemonics} option.@refill
Specifying @samp{-mcpu=403}, @samp{-mcpu=821}, or @samp{-mcpu=860} also
enables the @samp{-msoft-float} option.
......@@ -4950,15 +4936,15 @@ option, GNU CC will produce code that is slower and larger but which
uses extremely little TOC space. You may wish to use this option
only on files that contain less frequently executed code. @refill
@item -maix64
@itemx -maix32
@kindex -maix64
@kindex -maix32
Enable AIX 64-bit ABI and calling convention: 64-bit pointers, 64-bit
@item -m64
@itemx -m32
@kindex -m64
@kindex -m32
Enable 64-bit PowerPC ABI and calling convention: 64-bit pointers, 64-bit
@code{long} type, and the infrastructure needed to support them.
Specifying @samp{-maix64} implies @samp{-mpowerpc64} and
@samp{-mpowerpc}, while @samp{-maix32} disables the 64-bit ABI and
implies @samp{-mno-powerpc64}. GNU CC defaults to @samp{-maix32}.
Specifying @samp{-m64} implies @samp{-mpowerpc64} and
@samp{-mpowerpc}, while @samp{-m32} disables the 64-bit ABI and
implies @samp{-mno-powerpc64}. GNU CC defaults to @samp{-m32}.
@item -mxl-call
@itemx -mno-xl-call
......
gcc/md.texi
......@@ -1384,13 +1384,14 @@ Floating point register
Signed 16 bit constant
@item J
Constant whose low 16 bits are 0
Unsigned 16 bit constant shifted left 16 bits (use @samp{L} instead for
@code{SImode} constants)
@item K
Constant whose high 16 bits are 0
Unsigned 16 bit constant
@item L
Constant suitable as a mask operand
Signed 16 bit constant shifted left 16 bits
@item M
Constant larger than 31
......@@ -1418,6 +1419,9 @@ AIX TOC entry
@item S
Constant suitable as a 64-bit mask operand
@item T
Constant suitable as a 32-bit mask operand
@item U
System V Release 4 small data area reference
@end table
......
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